• 제목/요약/키워드: Polycrystalline structure

검색결과 388건 처리시간 0.028초

Co/내열금속/다결정 Si 구조의 실리사이드화와 열적안정성 (Silicidation and Thermal Stability of the So/refreactory Metal Bilayer on the Doped Polycrystalline Si Substrate)

  • 권영재;이종무
    • 한국세라믹학회지
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    • 제36권6호
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    • pp.604-610
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    • 1999
  • Silicide layer structures and morphology degradation of the surface and interface of the silicide layers for he Co/refractory metal bilayer sputter-deposited on the P-doped polycrystalline Si substrate and subjected to rapid thermal annealing were investigated and compared with those on the single Si substrate. The CoSi-CoSi2 phase transition temperature is lower an morphology degradation of the silcide layer occurs more severely for the Co/refractorymetal bilayer on the P-doped polycrystalline Si substrate than on the single Si substrate. Also the final layer structure and the morphology of the films after silicidation annealing was found to depend strongly upon the interlayer metal. The layer structure after silicidation annealing of Co/Hf/doped-poly Si is Co-Hf alloy/polycrystalline CoSi2/poly Si substrate while that of Co/Nb is polycrystalline CoSi2/NbSi2/polycrystalline CoSi2/poly Si.

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가스흐름 제어에 의한 균일한 다결정 3C-SiC 박막 성장 (The uniform polycrystalline 3C-SiC thin film growth by the gas flow control)

  • 윤규형;정귀상
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.92-92
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    • 2008
  • The surface flatness of heteroepitaxially grown 3C-SiC thin films is a key factor affecting electronic and mechanical device applications. This paper describes the surface flatness of polycrystalline 3C-SiC thin films by the gas flow control according to the location change of geometric structure. The polycrystalline 3C-SiC thin film was deposited by APCVD(Atmospheric pressure chemical vapor deposition) at $1200^{\circ}C$ using HMDS(Hexamethyildisilane : $Si_2(CH_3)_6)$ as single precursor, and 5 slm Ar as the main flow gas. According to the location of geometric structure, surface fringes and flatness changed. It shows the distribution of thickness is formed uniformly in the specific location of the geometric structure.

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다결정 실리콘의 화학증착에 대한 연구 (A Study on Chemical Vapor Deposition of Polycrystalline Silicon.)

  • 소명기
    • 산업기술연구
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    • 제2권
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    • pp.13-19
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    • 1982
  • Polycrystalline silicon layers have been deposited by a chemical vapor deposition technique using $SiCl_4$, $H_2$ gas mixture on single crystal silicon substrates. In this work, the effects of depostion temperature and total flow rate on the deposition rate of polycrystalline silicon are investigated. From the experimental results it was found that the formation reaction of polycrystalline silicon was limited by surface reaction and mass transfer controlled as the deposition temperature was increased. The morphology of polycrystalline silicon layer changed from a fine structure to a coarse one as the deposition temperature was increased.

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다결정 Si기판 위에서의 Co/Ti 이중층의 실리사이드화 (Silicidation of the Co/Ti Bilayer on the Doped Polycrystalline Si Substrate)

  • 권영재;이종무;배대록;강호규
    • 한국재료학회지
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    • 제8권7호
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    • pp.579-583
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    • 1998
  • P가 고농도로 도핑된 다결정 Si 기판 위에 Co/Ti 이중층막을 스퍼터 증착하고 급속열처리함으로써 얻어지는 실리사이드 층구조, 실리사이드막의 응집, 그리고 도펀트의 재분포 등을 단결정 Si 기판 위에서의 그것들과 비교하여 조사하였다. 다결정 Si 기판위에 형성한 Co/Si 이중층을 열처리할 때 단결정 기판에서의 경우보다 $CoSi_2$로의 상천이는 약간 더 낮은 온도에서 시작되며, 막의 응집은 더 심하게 일어난다. 또한, 다결정 Si 기판내의 도펀트보다 웨이퍼 표면을 통하여 바깥으로 outdiffusion 함으로써 소실되는 양이 훨씬 더 많다. 이러한 차이는 다결정 Si 내에서의 결정립계 확산과 고농도의 도펀트에 기인한다. Co/Ti/doped-polycrystalline si의 실리사이드화 열처리후의 층구조는 polycrystalline CoSi2/polycrystalline Si 으로서 Co/Ti(100)Si을 열처리한 경우의 층구조인 Co-Ti-Si/epi-CoSi2/(100)Si 과는 달리 Co-Ti-Si층이 사라진다.

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Structural Control Aiming for High-performance SiC Polycrystalline Fiber

  • Ishikawa, Toshihiro;Oda, Hiroshi
    • 한국세라믹학회지
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    • 제53권6호
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    • pp.615-621
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    • 2016
  • SiC-polycrystalline fiber (Tyranno SA, Ube Industries, Ltd.) shows very high heat-resistance and excellent mechanical properties up to very high temperatures. However, further increase in the strength is required. Up to now, we have already clarified the relationship between the strength and the defect-size of the SiC-polycrystalline fiber. The defects are formed during the conversion process from the raw material (amorphous Si-Al-C-O fiber) into SiC-polycrystalline fiber. In this conversion process, a degradation of the Si-Al-C-O fiber and a subsequent sintering of the degraded fiber proceed as well, accompanied by a release of CO gas and compositional changes, to obtain the dense SiC-polycrystalline fiber. Since these changes proceed in each filament, the strict control should be needed to minimize residual defects on the surface and in the inside of each filament for achieving the higher strength. In this paper, the controlling factors of the fiber strength and the fine structure will appear.

졸-겔법에 의한 다결정 물라이트 섬유의 제조 (Preparation of Polycrystalline Mullite Fiber Using the Sol-Gel Technique)

  • 김경용;김윤호;이수원;정형진;김구대
    • 한국세라믹학회지
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    • 제26권6호
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    • pp.795-801
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    • 1989
  • The polycrystalline mullite fiber was synthesized from various combination of starting materials including metal alkoxides and colloidal sol by the sol-gel process. The best spinnability was observed in the sol which showed shear thinning and hysteresis (i.e., thixotropic flow), indicating that the network structure was broken down as the shear rate increased. The mullite fiber was polycrystalline after firing and characterized by thermal analysis, XRD, FT-IR spectroscopy, rheological measurements, and SEM.

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Direct Conversion Sintering of Super-hard Nano-polycrystalline Diamond from Graphite

  • Sumiya, Hitoshi;Irifune, Tetsuo
    • 한국분말야금학회:학술대회논문집
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    • 한국분말야금학회 2006년도 Extended Abstracts of 2006 POWDER METALLURGY World Congress Part2
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    • pp.1309-1310
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    • 2006
  • High-purity and super-hard nano-polycrystalline diamond has been successfully synthesized by direct conversion from high-purity graphite under static pressures above 15 GPa and temperatures above $2300^{\circ}C$. This paper describes research findings on the formation mechanism of nano-structure and on the contributing factor leading to high hardness.

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Preparation of Highly Oriented ZnO Thin Films Prepared by Sol-Gel Method

  • Cheol Jeong;Hwang, Kyu-Seog;Moon, Jong-Ha;Kim, Byung-Hoon
    • The Korean Journal of Ceramics
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    • 제3권4호
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    • pp.249-252
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    • 1997
  • Highly oriented ZnO thin films were fabricated by dip-coating technique using zinc acetate 2-methoxyethanol 2-aminoethanol solution as starting materials, and effects of substrates on the film's orientation were investigated. Product films were obtained by prefiring at 300, 400, 500 and 550℃ for 10 min, followed by final heat-treatment at the same temperatures as prefiring for 1h. c-axis oriented films on glass substrates were prepared by heat treatment of prefiring films at 300-550℃, while films on alumina showed polycrystalline structure. Films with c-axis orientation exhibited lower specific resistivities than those of polycrystalline films with partial crack and pore.

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열처리온도에 따른 CdS박막 특성 (Characteristics of CdS thin film depending on annealing temperature)

  • 김성구;박계춘;유용택
    • E2M - 전기 전자와 첨단 소재
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    • 제7권1호
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    • pp.49-56
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    • 1994
  • Polycrystalline CdS thin films were deposited by using EBE method and its crystal structure, surface morphology, electrical and optical properties as a function of annealing temperature were investigated. It was found that optimum growth conditions were substrate temperature annealing temperature 300[.deg. C]. The films were hexagonal structure preferred(002) plane and maximum grain size was 421[.angs.]. As the results, resistivity and optical transmittance of CdS thin films were $8.3{\times}{10^3}$[.ohm.cm] and 89[%] respectively.

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OFF 전류의 감소를 위한 다결정 실리콘 박막 트랜지스터의 구조 연구 (A Study on the Structure of Polycrystalline Silicon Thin Film Transistor for Reducing Off-Current)

  • 오정민;민병혁;한민구
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1993년도 하계학술대회 논문집 B
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    • pp.1292-1294
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    • 1993
  • This paper proposes a new structure of polycrystalline silicon(poly-Si) thin film transistor(TFT) having a thick gate-oxide below the gate edge. The new structure is fabricated by the gate re-oxidation in wet ambient. It is shown that the thick gate-oxide below the gate edge is effective in reducing the leakage current and the gate-drain overlap capacitance. We have simulated this device by using the SSUPREM4 process simulator and the SPISCES-2B device simulator. As a simulation result it is found that the new structure provides a low tentage current less than 0.2 pA and achieves a on/off ratio as high as $5{\times}10^7$.

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