• Title/Summary/Keyword: Plasma display panel

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Thermal Properties of Phosphate Glass with Additives for Barrier-Ribs in Plasma Display Panel

  • Lee, Chung-Yong;Kim, Dong-Sun;You, Young-Jin;Lee, Sang-Ho;Hwang, Seong-Jin;Kim, Hyung-Sun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.823-826
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    • 2008
  • Phosphate glass added the various alkali additives is one of the substitutive materials for the barrier-ribs in plasma display panel. The results of differential thermal analysis and coefficient of thermal expansion show that the alkali oxides affect the thermal properties of phosphate glass.

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On the Cell Structure and Driving Method for High Efficiency Plasma Display Panel

  • Lee, Ho-Jun;Ok, Jung-Woo;Lee, Don-Kyu;Lee, Ji-Hoon;Lee, Hae-June;Kim, Dong-Hyun;Park, Chung-Hoo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1479-1482
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    • 2006
  • Potentials and advantages of recently proposed raised bus electrode plasma display panel is discussed in terms of luminous efficiency, addressing speed. Detailed experimental and simulation results, which shows mechanisms of high efficiency driving mechanism, will also be given. Apart from the cell structure, we introduce new high efficiency driving method that can be applicable to conventional ac Plasma Display Panel.

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AC Plasma Display Panel with Irregular Micro-scale Holes in the Front Dielectric Layer

  • Cho, Kwan-Hyun;Ahn, Sung-Il;Kim, Woo-Hyun;Choi, Kyung-Cheol
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.711-712
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    • 2009
  • The fabrication of micro-scale irregular holes by using PMMA (Poly Methyl Methacrylate) beads in the front dielectric layer was proposed to improve luminous efficacy of an ac plasma display panel. Through the firing process of front dielectric layer, bowl shaped holes with a depth of $2.5{\mu}m$, a top diameter of $8-12{\mu}m$, and a bottom diameter of $4-7{\mu}m$ were fabricated. The proposed ac plasma display panel with the irregular micro-scale holes improved the luminous efficacy by 18 % due to the decrease in the minimum sustain voltage.

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Evaluation of the Electrical Resistance between ITO/black interlayer/Bus electrodes in a Plasma Display Panel (플라스마 디스플레이 패널에서 ITO/black interlayer/Bus 전극 간의 전기저항 평가)

  • Moon, Cheol Hee
    • Korean Journal of Metals and Materials
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    • v.46 no.2
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    • pp.97-104
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    • 2008
  • Black interlayer was introduced into between ITO and Bus electrodes to enhance a bright room contrast ratio of a plasma display panel. To measure the electrical resistance of the black interlayer, we designed two test patterns, type I and type II, of which type II pattern was successful. Using type II test pattern, the electrical resistance of the black interlayer was measured to be $300{\Omega}$ for $2{\mu}m$ thickness case and infinitely high for 4, $6{\mu}m$ thickness. This result shows that electrical resistance of the black interlayer in the ITO/black interlayer/Bus electrodes structure is a critical parameter which determines the electrical characteristics of the PDP.

Low Cost Driving System for Plasma Display Panels by Eliminating Path Switches and Merging Power Switches

  • Lee, Dong-Myung;Hyun, Dong-Seok
    • Journal of Power Electronics
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    • v.7 no.4
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    • pp.278-285
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    • 2007
  • Recently, plasma display panels (PDP) have become the most promising candidate in the market for large screen size flat panel displays. PDPs have many merits such as a fast display response time and wide viewing angle. However, there are still concerns about high cost because they require complex driving circuits composed of high power switching devices to generate various voltage waveforms for three operational modes of reset, scan, and sustain. Conventional PDP driving circuits use path switches for voltage separation and a scan switch to offer a scan voltage for reset and scan operations, respectively. In addition, there exist reset switches to initialize PDPs by regulating the wall charge conditions with ramp shaped pulses, which means the necessity of specific power devices for the reset operation. Because power for the plasma discharge accompanied by a large current is transferred to a panel via path switches, high power rating switches are used for path switches. Therefore, this paper proposes a novel low-cost PDP driving scheme achieved by not only eliminating path switches but also merging the function of reset switches into other switches used for sustain or scan operations. The simulated voltage waveforms of the proposed topology and experimental results implemented in a 42-inch panel to demonstrate the validity of using a new gate driver that merges the functions of power switches are presented.

Design of Driving methods of lower power consumption in Plasma AI(plasma adaptive intensifier) driving method (Plasma AI(plasma adaptive intensifier)구동의 전력 소모 개선을 위한 구동방식 설계)

  • Kim, Jun-Hyeong;O, Sun-Taek;Lee, Dong-Ho
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.844-847
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    • 2003
  • Display devices are becoming increasingly important as an interface between humans and machines in the growing information society. In display devices, PDP (Plasma Display Panel) has many advantages in that it has wide screen, wide viewing angle and is light weight, thin. In PDP driving method, if the brightness of input image is high, applying the fixed sustain pulse to the PDP panel will raise the PDP power consumption and may damages the PDP panel. To overcome these problems, the Plasma AI driving method was introduced by the Matshushita co. in Japan. The Plasma AI driving module calculates the peak value and average value of 1 frame image and adjusts the gradation and sustain pulses for 1 frame sustain. In this paper, the proposed PDP driving module is based on the Plasma AI driving module. The proposed driving module calculates peak value and average value, and the brightness distribution of 1 frame image. Using brightness distribution, the proposed driving module divides 1 frame input image into 15 image patterns. For each image pattern, minimum sustain pulses and sub-frames are used for the brightness of 1 frame image and the sustain weight for 64, 128, 192 gradation is proposed. Therefore, the sustain power consumption can be reduced.

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23' LCD TV by using ALT plasma beam alignment technology

  • Lee, C.Y.;Tang, H.C.;Chen, C.W.;Shih, Y.J.;Liu, C.H.;Lin, C.H.;Yang, K.H.;Lin, S.H.;Chang, H.C.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.776-779
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    • 2006
  • The alignment of liquid crystal (LC) is one of the key issues of liquid crystal display (LCD) technologies. In this study, we aligned polyimide (as the LC alignment layer) by ALT plasma beam and to realize the stability and characteristics of this technology. The characteristics such as anchoring energy, pre-tilt angle, voltage holding ratio(VHR) and residual direct current(Rdc) were discussed. Besides, we applied it to the in plane switch (IPS) mode 23" WXGA real panel, the performance parameters and electrical properties were measured and compared with those of rubbing alignment. From the result, we demonstrated a successful LC alignment treatment process in real panel by ALT plasma beam.

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Influence of wall charge configurations prior to addressing discharge on dynamic margin in AC Plasma Display Panel

  • Jung, Y.;Choi, J.H.;Jung, K.B.;Kim, S.B.;Choi, E.H.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2003.07a
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    • pp.764-767
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    • 2003
  • We have experimentally investigated the influence of wall charge configurations prior to addressing discharge on dynamic margin in AC plasma display panel. In this experiment, we have analyzed the quantity and polarity of wall charge accumulated on the front and rear dielectrics just prior to the addressing discharge under the conventional driving sequence.

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A Sub-field Rearrangement Driving Method for Reducing Dynamic False Contour in Plasma Display Panels

  • Lee, Seung-Yong;Choi, Byong-Deok
    • Journal of Information Display
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    • v.7 no.1
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    • pp.30-34
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    • 2006
  • A sub-field rearrangement driving method has been proposed to reduce a DFC (Dynamic False Contour) phenomenon in plasma display panels. The proposed driving method expresses 256 gray levels with 16 sub-fields, while conventional one uses only 8 sub-fields. Notwithstanding the increase in the number of sub-fields, the display time is similar to the conventional 8 sub-fields driving method by appropriate choosing selective writing and selective erasing for sub-fields.

Study on Noise Reduction of Plasma Display Panel (플라즈마 디스플레이의 소음 저감 연구)

  • Park, Dae-Kyong;Kweon, Hae-Sub;Jang, Dong-Seob
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2002.11b
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    • pp.693-698
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    • 2002
  • For the evaluation of the plasma display panel (PDP)'s noise, vibration and sound characteristics of fanless PDP are measured and investigated. PDP is a type of two-electrode vacuum tube which operates on the same principle as a household fluorescent light. An inert gas such as argon or neon is injected between two glass plates on which transparent electrodes have been formed, and the glass is illuminated by generating discharge. For this discharge, both high voltage and currents are needed and cause an acoustic noise. We investigated the noise characteristics connected with both a electromagnetic elements from SMPS to panel through X, Y and logic board, and a mechanical elements form panel to case through transfer path which related with vibration and heat. To reduce the noise of PDP, a discharge pulse memory design related with both higher brightness and lower power consumption is important and mechanical characteristics connected with dissipation process of both heat and vibration generated by panel discharge must be investigated.

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