• Journal of the Korean Crystal Growth and Crystal Technology
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• v.16 no.3
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• pp.116-120
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• 2006

We have investigated plasma spray coated $Al_2O_3$ layers on Al-60 series substrates for development of wafer electrostatic chuck in semiconductor dry etching system. Samples were prepared without/with cooling bar on backside of samples, at various distances, and with different powder feed rates. There were many cracks and pores in the $Al_2O_3$ layers coated on Al-60 series substrates without cooling bar on the backside of samples. But the cracks and pores were almost disappeared in the $Al_2O_3$ layers on Al-60 series substrates coated with cooling bar on the back side of samples, 15 g/min. powder feed rate and various 60, 70, 80 mm working distances. Then the surface morphology was not changed with various working distances of 60, 70, 80 mm. When the powder feed rate was changed from 15 g/min to 20 g/min, the crack did not appear, but few pores appeared. Also the $Al_2O_3$ layer was coated with many small splats compared with $Al_2O_3$ layer coated with 15 g/min powder feed rate. The deposited rate of $Al_2O_3$ layer was higher when the process was done without cooling bar on the back side of sample than that with cooling bar on the back side of sample.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.1
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• pp.84-93
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• 2001

An electromagnetic micro x-y stage for probe-based data storage (PDS) has been fabricated. The x-y stage consists of a silicon body inside which planar copper coils are embedded, a glass substrate bonded to the silicon body, and eight permanent magnets. The dimensions of flexures and copper coils were determined to yield $100{\;}\mu\textrm{m}$ in x and y directions under 50 mA of supplied current and to have 440 Hz of natural frequency. For the application to PDS devices, electromagnetic stage should have flat top surface for the prevention of its interference with multi-probe array, and have coils with low resistance for low power consumption. In order to satisfy these design criteria, conducting planar copper coils have been electroplated within silicon trenches which have high aspect ratio ($5{\;}\mu\textrm{m}$in width and $30{\;}\mu\textrm{m}$in depth). Silicon flexures with a height of $250{\;}\mu\textrm{m}$ were fabricated by using inductively coupled plasma reactive ion etching (ICP-RIE). The characteristics of a fabricated electromagnetic stage were measured by using laser doppler vibrometer (LDV) and dynamic signal analyzer (DSA). The DC gain was $0.16{\;}\mu\textrm{m}/mA$ and the maximum displacement was $42{\;}\mu\textrm{m}$ at a current of 180 mA. The measured natural frequency of the lowest mode was 325 Hz. Compared with the designed values, the lower natural frequency and DC gain of the fabricated device are due to the reverse-tapered ICP-RIE process and the incomplete assembly of the upper-sided permanent magnets for LDV measurements.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.16.1-16.1
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• 2011

$TiO_2$ is a promising material for gas sensors. To achieve high sensitivities, the material should exhibit a large surface-to-volume ratio and possess the high accessibility of the gas molecules to the surface. Accordingly, a wide variety of porous $TiO_2$ nanomaterials synthesized by wet-chemical methods have been reported for gas sensor applications. Nonetheless, achieving the large-area uniformity and comparability with well-established semiconductor production processes of the methods is still challenging. An alternative method is soft-templating which utilizes nanostructured inorganic or organic materials as sacrificial templates for the preparation of porous materials. Fabrication of macroporous $TiO_2$ films and hollow $TiO_2$ tubes by soft-templating and their gas sensing applications have been reported recently. In these porous materials composed of assemblies of individual micro/nanostructures, the form of links or necks between individual micro/nanostructures is a critical factor to determine gas sensing properties of the material. However, a systematic study to clarify the role of links between individual micro/nanostructures in gas sensing properties of a porous metal oxide matrix is thoroughly lacking. In this work, we have demonstrated a fabrication method to prepare highly-ordered, embossed $TiO_2$ films composed of anatase $TiO_2$ hollow hemispheres via soft-templating using polystyrene beads. The form of links between hollow hemispheres could be controlled by $O_2$ plasma etching on the bead templates. This approach reveals the strong correlation of gas sensitivity with the form of the links. Our experimental results highlight that not only the surface-to-volume ratio of an ensemble material composed of individual micro/nanostructures but also the links between individual micro/nanostructures play a critical role in evaluating the sensing properties of the material. In addition to this general finding, the facileness, large-scale productivity, and compatability with semiconductor production process of the proposed fabrication method promise applications of the embossed $TiO_2$ films to high-quality sensors.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.04b
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• pp.7-7
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• 2009

Lead telluride (PbTe) is a very promising thermoelectric material due to its narrow band gap (0.31 eV at 300 K), face-centered cubic structure and large average excitonic Bohr radius (46 nm) allowing for strong quantum confinement within a large range of size. In this work, we present the thermoelectric properties of individual single-crystalline PbTe nanowires grown by a vapor transport method. A combination of electron beam lithography and a lift-off process was utilized to fabricate inner micron-scaled Cr (5 nm)/Au (130 nm) electrodes of Rn (resistance of a near electrode), Rf (resistance of a far electrode) and a microheater connecting a PbTe nanowire on the grid of points. A plasma etching system was used to remove an oxide layer from the outer surface of the nanowires before the deposition of inner electrodes. The carrier concentration of the nanowire was estimated to be as high as $3.5{\times}10^{19}\;cm^{-3}$. The Seebeck coefficient of an individual PbTe nanowire with a radius of 68 nm was measured to be $S=-72{\mu}V/K$ at room temperature, which is about three times that of bulk PbTe at the same carrier concentration. Our results suggest that PbTe nanowires can be used for high-efficiency thermoelectric devices.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.12
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• pp.8-13
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• 2001

Cerium oxide ($CeO_2$) thin film has been proposed as a buffer layer between the ferroelectric thin film and the Si substrate in Metal-Ferroelectric-Insulator-Silicon (MFIS) structures for ferroelectric random access memory (FRAM) applications. In this study, $CeO_2$ thin films were etched with $Cl_2$/Ar gas mixture in an inductively coupled plasma (ICP). Etch properties were measured for different gas mixing ratio of $Cl_2$($Cl_2$+Ar) while the other process conditions were fixed at RF power (600 W), dc bias voltage (-200 V), and chamber pressure (15 mTorr). The highest etch rate of $CeO_2$ thin film was 230 ${\AA}$/min and the selectivity of $CeO_2$ to $YMnO_3$ was 1.83 at $Cl_2$($Cl_2$+Ar gas mixing ratio of 0.2. The surface reaction of the etched $CeO_2$ thin films was investigated using x-ray photoelectron spectroscopy (XPS) analysis. There is a Ce-Cl bonding by chemical reaction between Ce and Cl. The results of secondary ion mass spectrometer (SIMS) analysis were compared with the results of XPS analysis and the Ce-Cl bonding was monitored at 176.15 (a.m.u). These results confirm that Ce atoms of $CeO_2$ thin films react with chlorine and a compound such as CeCl remains on the surface of etched $CeO_2$ thin films. These products can be removed by Ar ion bombardment.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.105-110
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• 2008

We have proposed a new structure of poly-silicon thin film transistor(TFT) which was fabricated the LDD region using doping oxide with graded spacer by etching shape retio. The devices of n-channel poly-si TFT's hydrogenated by $H_2$ and $HT_2$/plasma processes are fabricated for the devices reliability. We have biased the devices under the gate voltage stress conditions of maximum leakage current. The parametric characteristics caused by gate voltage stress conditions in hydrogenated devices are investigated by measuring /analyzing the drain current, leakage current, threshold voltage($V_{th}$), sub-threshold slope(S) and transconductance($G_m$) values. As a analyzed results of characteristics parameters, the degradation characteristics in hydrogenated n-channel polysilicon TFT's are mainly caused by the enhancement of dangling bonds at the poly-Si/$SiO_2$ interface and the poly-Si Brain boundary due to dissolution of Si-H bonds. The structure of novel proposed poly-Si TFT's are the simplity of the fabrication process steps and the decrease of leakage current by reduced lateral electric field near the drain region.

• Journal of the Korean Chemical Society
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• v.45 no.4
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• pp.341-350
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• 2001

Aluminum Hydroxide was employed as a thermal retardent and flame retardent for Chloropolyethylene (CPE) rubbery materials which is the construction material of automotive oil cooler hose. and then cure characteristics, physical properties, thermal resistance and flame retardation of compounded rubber were investigated, and optimum mixing conditions of rubber and flame retarding agent were deduced from the experimental results. CPE rubber material which has excellent properties of chemical corrosion resistance and cold resistance and inexpensive in price was used to prepare rubber specimen. The by-product of ething, produced from the process of surface treatment of aluminum was processed to aluminum hydroxide via crushing and purification, which is characterized by XRD, PSA, SEM and ICP-AES techniques in terms of phase, size, distribution, morphology and components of particles and then mixed to CPE rubber materials in the range of 0~80 phr. Hardness, tensile strength, elongation and thermal properties of compounded rubber specimens were tested. The optimum mixing ratio of rubber to additives to give maximum effect on thermal resistance and flame retardation, within the range of tolerable specification for rubber materials, was determined to be 40 phr. The flame retardation of CPE rubber materials was found to be increased by 5 times at this mixing ratio.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.319-322
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• 2003

To match the charge induced by the insulators $CeO_2$ with the remanent polarization of ferro electric SBT thin films, areas of Pt/SBT/Pt (MFM) and those of $Pt/CeO_2/Si$ (MIS) capacitors were ind ependently designed. The area $S_M$ of MIS capacitors to the area $S_F$ of MFM capacitors were varied from 1 to 10, 15, and 20. Top electrode Pt and SBT layers were etched with for various area ratios of $S_M\;/\;S_F$. Bottom electrode Pt and $CeO_2$ layers were respectively deposited by do and rf sputtering in-situ process. SBT thin film were prepared by the metal orgnic decomposition (MOD) technique. $Pt(100nm)/SBT(350nm)/Pt(300nm)/CeO_2(40nm)/p-Si$ (MFMIS) gate structures have been fabricated with the various $S_M\;/\;S_F$ ratios using inductively coupled plasma reactive ion etching (ICP-RIE). The leakage current density of MFMIS gate structures were improved to $6.32{\times}10^{-7}\;A/cm^2$ at the applied gate voltage of 10 V. It is shown that in the memory window increase with the area ratio $S_M\;/\;S_F$ of the MFMIS structures and a larger memory window of 3 V can be obtained for a voltage sweep of ${\pm}9\;V$ for MFMIS structures with an area ratio $S_M\;/\;S_F\;=\;6$ than that of 0.9 V of MFS at the same applied voltage. The maximum memory windows of MFMIS structures were 2.28 V, 3.35 V, and 3.7 V with the are a ratios 1, 2, and 6 at the applied gate voltage of 11 V, respectively. It is concluded that ferroelectric gate capacitors of MFMIS are good candidates for nondestructive readout-nonvolatile memories.

• Journal of the Korean Vacuum Society
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• v.7 no.4
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• pp.403-409
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• 1998

In this study, the effects of multi-dipole type of magnets on the characteristics of the inductively coupled plasmas and $SiO_2$ etch properties were investigated. As the magnets, 4 pairs of permanent magnets were used and, to etch $SiO_2, C_2F_6, CHF_3, C_4F_8, H_2$, and their combinations were used. The characteristics of the magnetized inductively coupled plasmas were investigated using a Langmuir probe and an optical emission spectrometer, and $SiO_2$ etch rates and the etch selectivity over photoresist were measured using a stylus profilometer. The use of multi-dipole magnets increased the uniformity of the ion density over the substrate location even though no significant increase of ion density was observed with the magnets. The use of the magnets also increased the electron temperature and radical densities while reducing the plasma potential. When $SiO_2$ was etched using the fluorocarbon gases, the significant increase of $SiO_2$ etch rates and also the increase of etch uniformity over the substrate were obtained using the magnets. In case of gas combinations with hydrogen, $C_4F_8/H_2$ showed the highest etch rates and etch selectivities over photoresist among the gas combinations with hydrogen used in the experiment. By optimizing process parameters at 1000 Watts of inductive power with the magnets, the highest $SiO_2$ etch rate of 8000 $\AA$/min could be obtained for 50% $C_4F_8/50% H_2$.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.22 no.1
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• pp.5-10
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• 2012

In general, the fabrications of the LEDs with mesa structure are performed grown by MOCVD method. In order to etch and separate each chips, the LEDs are passed the RIE and scribing processes. The RIE process using plasma dry etching occur some problems such as defects, dislocations and the formation of dangling bond in surface result in decline of device characteristic. The SAG method has attracted considerable interest for the growth of high quality GaN epi layer on the sapphire substrate. In this paper, the SAG method was introduced for simplification and fabrication of the high quality epi layer. And we report that the size of selective area do not affect the characteristics of original LED. The diameter of SAG circle patterns were choose as 2500, 1000, 350, and 200 ${\mu}m$. The SAG-LEDs were measured to obtain the device characteristics using by SEM, EL and I-V. The main emission peaks of 2500, 1000, 350, and 200 ${\mu}m$ were 485, 480, 450, and 445 nm respectively. The chips of 350, 200 ${\mu}m$ diameter were observed non-uniform surface and resistance was higher than original LED, however, the chips of 2500, 1000 ${\mu}m$ diameter had uniform surface and current-voltage characteristics were better than small sizes. Therefore, we suggest that the suitable diameter which do not affect the characteristic of original LED is more than 1000 ${\mu}m$.