• 제목/요약/키워드: Photo resist

검색결과 102건 처리시간 0.029초

단층RESIST의 미세패턴형성기술 (SUBMICRON TECHNOLOGY OF SINGLE LAYER PHOTO-RESIT)

  • 배경성;홍승각
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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    • pp.315-318
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    • 1988
  • PHOTO-RESIST 자체문제로인해 감소되는 최소해상력, 촛집심도여유 및 CRITICAL DIMENSION (C.D.) 조정여유도등을 연구하였다. 기존에 사용중인 PHOTO-RESIST(큰 분자량)와 PHOTO-RESIST자체내에 CONTRAST 촉진 물질(CEM)이 첨가된것(INNER CEM TYPE) 및 PHOTO-RESIST구성성분중 작은 분자량/좁은 분자량 산포가 형성된 RESIN 의 PHOTO-RESIST(LOW MOLECULAR WEIGHT CONTROL TYPE)등 세가지 PHOTO-RESIST를 사용 하여 상기의 항목을 분석하였다. INNER CEM TYPE 및 LOW MOLECULAR WEIGHT CONTROL TYPE의 PHOTO-RESIST는 기존에 사용중인 RESIST보다, 최소 RESOLUTION은 약 0.2 - 0.3 um, DEPOCUS MARGIN은 약 0.8 - 1.2 um 및 C.D. CONTROL LATITUDE 향상된 것 등이 우수하였다.

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Slit-Coater 노즐에서 Photo Resist의 유동 특성 (Flow Characteristics of Photo Resist in a Slit-Coater Nozzle)

  • 김장우
    • 반도체디스플레이기술학회지
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    • 제3권3호
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    • pp.37-40
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    • 2004
  • This study presents numerical solutions of three-dimensional laminar flow-field formed by photo resist flow in a slit-coater model. We discuss on the governing equations, laminar viscosities and the computational model applied in our numerical calculation and some results. We prove that the structure of tapered-cavity aid to make uniform pressure-field and boundary effect is an important problem to improve coating uniformity. In view of uniformity improvement, it is necessary to study for the structure of cavity and flow path.

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Silylation Photo resist 공정과 Enhanced-Inductively Coupled Plasma (E-ICP) (The Silylation Photo Resist Process and the Enhanced-Inductively Coupled Plasma (E-ICP))

  • 정재성;박세근;오범환
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.922-925
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    • 1999
  • The Silylation photo-resist etch process was tested by Enhanced-ICP dry etcher. The comparison of the two process results of micro pattern etching with 0.25${\mu}{\textrm}{m}$ CD by E-ICP and ICP reveals that E-ICP has better quality than ICP The etch rate and the microloading effect was improved in E-ICP Especially, the problem of the lateral etch was improved in E-ICP.

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Slit-Coater내의 Photo Resist의 코팅 특성 (Coating Characteristics of Photo Resist in a Slit-Coater)

  • 김장우;정진도;김성근
    • 반도체디스플레이기술학회지
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    • 제3권3호
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    • pp.41-44
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    • 2004
  • The aim of this study is the confirmation of the coating uniformity affected by the surface tension and wall attachment angle in a slit-coater model. In this work, we use the commercial code (Fluent) to solve the two-phase flow formed with air and photo resist numerically. The results show that the surface tension is the most important factor to determine the coating efficiency in the view of coating uniformity, and the coating uniformity is 2% for our slit-coater model and conditions. To improve the coating uniformity, it is in need of minimization of the sidewall effect of slit-coater.

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RF 및 Microwave 응용을 위한 SU-8 공정 연구 (A Study on SU-8 Fabrication Process for RF and Microwave Application)

  • 왕종;김남영
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.65-66
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    • 2009
  • This paper describes a procedure developed to fabricate negative photo resist SUMS to a semi-insulating (SI)-GaAs-based substrate. SU-8 is attractive for micromachine multi-layer circuit fabrication, because it is photo-polymerizable resin, leading to safe, and economical processing. This work demonstrates SUMS photo resist can be used for RFIC/MMIC application.

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포토레지스트 공급용 미소유량계 개발 (Development of Micro-flowmeter for Supplying Photo-resist)

  • 김신호;정선환;최성대
    • 한국공작기계학회논문집
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    • 제16권5호
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    • pp.198-204
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    • 2007
  • This study was carried out to develope a flow control system using to supply PR(photo-resist) in the semi-conductor manufacturing process. The features of this system are to be able to measure the high viscosity and micro-flow. To meet above study object some ideas was induced to design a new concept valve with new material, multi-cross wheel, and new sealing method etc.. As the evaluations on the developed micro-flowmeter it was enough satisfied to use at the IT industries such as photo-resist process.

A Control Algorithm for Wafer Edge Exposure Process

  • Park, Hong-Lae;Joon Lyou
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2002년도 ICCAS
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    • pp.55.4-55
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    • 2002
  • In the semiconductor fabrication, particle contamination is wide-spread and one of major causes to yield loss. Extensive testing has revealed that even careful handling of wafers during processing may cause photo-resist materials to flake off wafer edges. So, to remove the photo-resist at the outer 5mm of wafers, UV(Ultraviolet) rays are exposed. WEE (Wafer Edge Exposure) process station is the system that exposes the wafer edge as prespecified by controlling the positioning mechanism and maintaining the light intensity level In this work, WEE process station has been designed so as to significantly lower the amount of particle contamination which occurs even during the most r...

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