• 전자공학회논문지A
• /
• 제31A권5호
• /
• pp.106-112
• /
• 1994

We have developed a large area ion shower doping system with an RF plasma ion source. The ion current density (i.e., doping concentration) increases with RF power and acceleration voltage. Using this technique, we investigated the optimum condition for ion doping of phosphorus in a-Si:H and poly-Si films. The optimum acceleration voltage and doping time are 6KV and 90sec, respectively, in a-Si:H films. Under this condition the electrical conductivity of ion-doped a-Si:H film is obtained ~10$^{-3}$/cm at room temperature. The sheet resistance decreases witnh acceleration voltage in ion-doped poly-Si, and a heavily-doped layer with a sheet resistance of 920$\Omega$/ㅁ is obtained by using ion doping and subsequent activation.

• E2M - 전기 전자와 첨단 소재
• /
• 제11권11호
• /
• pp.22-27
• /
• 1998

We have investigated the effect of an ion shower doping of the laser annealed poly-Si films at an elevated substrate temperatures. The substrate temperature was varied from room temperature to 300$^{\circ}C$ when the poly-Si film was doped with phosphorus by a non-mass-separated ion shower. Optical, structural, and electrical characterizations have been performed in order to study the effect of the ion showering doping. The sheet resistance of the doped poly-Si films was decreased from7${\times}$106 $\Omega$/$\square$ to 700 $\Omega$/$\square$ when the substrate temperature was increased from room temperature to 300$^{\circ}C$. This low sheet resistance is due to the fact that the doped film doesn't become amorphous but remains in the polycrystalline phase. The mildly elevated substrate temperature appears to reduce ion damages incurred in poly-Si films during ion-shower doping. Using the ion-shower doping at 250$^{\circ}C$, the field effect mobility of 120 $\textrm{cm}^2$/(v$.$s) has been obtained for the n-channel poly-Si TFTs.

• 한국신재생에너지학회:학술대회논문집
• /
• 한국신재생에너지학회 2011년도 춘계학술대회 초록집
• /
• pp.122.1-122.1
• /
• 2011

Phosphorus is known to pile-up at the silicon surface when it is thermally oxidized. A thin layer, about 40nm thick from the silicon surface, is created containing more phosphorus than the bulk of the emitter. This layer has a gaussian profile with the peak at the surface of the silicon. In this study the pile-up effect was studied if this layer can act as a front surface field for solar cells. The effect was also tested if its high dose of phosphorus at the silicon surface can lower the contact resistance with the front metal contact. P-type wafers were first doped with phosphorus to create an n-type emitter. The doping was done using either a furnace or ion implantation. The wafers were then oxidized using dry thermal oxidation. The effect of the pile-up as a front surface field was checked by measuring the minority carrier lifetime using a QSSPC. The contact resistance of the wafers were also measured to see if the pile-up effect can lower the series resistance.

• 한국전기전자재료학회논문지
• /
• 제13권2호
• /
• pp.95-100
• /
• 2000

For the well-controlled growing in-situ heavily phosphorus doped polycrystalline Si films directly on Si wafer by reduced pressure chemical vapor deposition, a study is made of the two step growth. When in-situ heavily phosphorus doped Si films were deposited directly on Si (100) wafer, crystal structure in the film is not unique, that is, the single crystal to polycrystalline phase transition occurs at a certain thickness. However, the well-controlled polycrtstalline Si films deposited by two step growth grew directly on Si wafers. Moreover, the two step growth, which employs crystallization of grew directly on Si wafers. Moreover, the two step growth which employs crystallization of amorphous silicon layer grown at low temperature, reveals crucial advantages in manipulating polycrystal structures of in-situ phosphorous doped silicon.

• 한국전기전자재료학회논문지
• /
• 제20권2호
• /
• pp.113-117
• /
• 2007

We have investigated the effects of doping concentration in polysilicon floating gate on the endurance characteristics of the EEPROM cell haying the structure of spacer select transistor. Several samples were prepared with different implantation conditions of phosphorus for the floating gate. Results show the dependence of doping concentration in polysilicon floating gate on performance of EEPROM cell from the floating gate engineering point of view. All of the samples were endured up to half million programming/erasing cycle. However, the best $program-{\Delta}V_{T}$ characteristic was obtained in the cell doped at the dose of $1{\times}10^{15}/cm^{2}$.

• 한국재료학회:학술대회논문집
• /
• 한국재료학회 1998년도 IUMRS-ICEM ABSTRACT BOOK
• /
• pp.80.3-80
• /
• 1998

• 한국전기전자재료학회논문지
• /
• 제12권1호
• /
• pp.18-26
• /
• 1999

In this study, the undoped amorphous layers and phosphorus doped amorphous layers are fabricated using LPCVD at 531$^{\circ}C$ with SiH$_4$ gas or at same temperature with PH$_3$ gas during deposition, respectively. The thickness of deposited amorphous layer from this experiments was 5000 ${\AA}$. In this experiments, undoped amorphous layers are deposited with SiH$_4$and Si$_2$H$\_$6/ gas in a low pressure reactor using LPCVD. These amorphous layers can be doped for poly-silicon by phosphorus ion implantation. The experiments of this study are carried out by phosphorus ion implantation with energy 40 keV into P doped and undoped amorphous silicon layers. The distribution of phosphorus profiles are measured by SIMS(Cameca 6f). Recoiling effects and two dimensional profiles are also explained by comparisions of experimental and simulated data. Finally range moments of SIMS profiles are calculated and compared with simulation results.

• Transactions on Electrical and Electronic Materials
• /
• 제2권2호
• /
• pp.32-36
• /
• 2001

A new solid source for low temperature diffusion into silicon was developed. The source wafer consists of an “active” compound, which is sol-gel prepared phosphosilicate glass-ceramics containing 56% P$_2$O$\sub$5/, embedded in a skeletal foam-like, inert substrate. Phosphorus diffusion from the new solid sources at low temperatures (800-875$^{\circ}C$) produced reprodecible sheet resistances and shallow junctions. From a series of one hour doping runs, the life time of the phosphosilicate source was determined to be over 40 hours. The effective diffusion coefficient of phosphorus into silicon and the corresponding activation energy at 850$^{\circ}C$ were determined to be 7.5${\times}$10$\^$-15/ $\textrm{cm}^2$/sec and ∼3.9 eV, respectively.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
• /
• pp.540-542
• /
• 2009

Phosphorus doped ZnO (PZO) thin films were deposited on $SiO_2$/n-Si substrates using DC magnetron sputtering system varying oxygen partial pressures from 0 to 40 % under Ar atmosphere. The deposited films showed reduced n-type conductivity due to the compensating donor effects by phosphorus dopant. The bias-time stability shows relatively good stability over bias and time comparing to un-doped ZnO-based TFTs.

• EDISON SW 활용 경진대회 논문집
• /
• 제2회(2013년)
• /
• pp.273-277
• /
• 2013

We apply a density functional theory (DFT) and DFT-based non-equilibrium Green's function approach to study the electronic and transport properties of graphene nanoribbons (GNRs) co-doped with boron-nitrogen, nitrogen-phosphorus and boron-phosphorus. We analyze the structures and charge transport properties of co-doped GNRs and particularly focus on the novel effects that are absent for the single N-, B-, or P-doped GNRs. It is found that co-doped GNRs tend to be doped at the edges and the electronic structures of co-doped GNRs are very sensitive to the doping sites. Also, in case of B-N and B-P co-doped GNRs, conductance dips of single-doped GNRs disappeared with the disappearance of localized states associated with doped atoms. This may lead to a possible method of band engineering of GNRs and benefit the design of graphene electronic devices.