• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.144-145
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• 2007

Phase change random access memory is one of the most promising candidates for next generation non-volatile memories. However, the high reset current is one major obstacle to develop a high density PRAM. One way of the reset current reduction is to develop the new phase change material. In this paper, to reduce the reset current for phase transition, we have investigated the effect of phase change material parameters using finite element analysis.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.97-98
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• 2007

In this paper, we analyzed the reset current variation of PRAM device with top electrode using the 3-D finite element analysis tool. As thickness of phase change material thin film decreased, reset current caused by phase transition highly increased. Joule's heat which was generated at the contact surface of phase change material and bottom electrode of PRAM was given off through top electrode to which was transferred phase change material. As thermal conductivity of top electrode decreased, heating temperate was increased.

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.32-33
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• 2006

As next generation nonvolatile memory, chalcogenide-based phase change memory can substitute for a conventional flash memory from its high performance. Also, fast writing speed, low writing voltage, high sensing margin, low power consumption and repetition reliability over $10^{15}$ cycle shows its possibility. At our laboratory, we invented ${Ge_1}{Se_1}{Te_2}$ material to alternate with conventional ${Ge_2}{Sb_2}{Te_5}$ for improve its ability. We respect the ${Ge_1}{Se_1}{Te_2}$ material can be a solution for high power consumption problem and long time at 'set' performance. A conductivity experiment from variable temperature was performed to see reliability of repetition at read and write performance. Compare with conventional ${Ge_2}{Sb_2}{Te_5}$ material, these two materials are used as complex compound to get the finest parameter.

• IEMEK Journal of Embedded Systems and Applications
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• v.13 no.5
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• pp.261-268
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• 2018

Phase Change Memory(PCM) with low power consumption and high integration attracts attention as a next generation nonvolatile memory replacing DRAM. However, there is a problem that PCM has long latency and high energy consumption due to the writing operation. The PCM & DRAM hybrid memory structure is a fruitful structure that can overcome the disadvantages of such PCM. However, the page replacement algorithm is important, because these structures use two memory of different characteristics. The purpose of this document is to effectively manage pages that can be referenced in memory, taking into account the characteristics of DRAM and PCM. In order to manage these pages, this paper proposes an page replacement algorithm based on frequently accessed and recently paged. According to our simulation, the proposed algorithm for the DRAM&PCM hybrid can reduce the energy-delay product by around 10%, compared with Clock-DWF and CLOCK-HM.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.3
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• pp.146-152
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• 2011

Thermal stability of $Ge_2Sb_2Te_5$ (GST) and $SiO_2$ doped GST (SGST) films for phase change random access memory applications was investigated by observing the change of surface roughness, layer density and composition of both films after isothermal annealing. After both GST and SGST films were annealed at $325^{\circ}C$ for 20 min, root mean square (RMS) surface roughness of GST was increased from 1.9 to 35.9 nm but that of SGST was almost unchanged. Layer density of GST also steeply decreased from 72.48 to 68.98 $g/cm^2$ and composition was largely varied from Ge : Sb : Te = 22.3 : 22.1 : 55.6 to 24.2 : 22.7 : 53.1, while those of SGST were almost unchanged. It was confirmed that the addition of a small amount of $SiO_2$ into GST film restricted the deterioration of physical and chemical properties of GST film, resulting in the better thermal stability after isothermal annealing.

• Journal of the Korean Vacuum Society
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• v.19 no.2
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• pp.155-160
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• 2010

The effect of process temperature of a final annealing step in the fabrication of phase change memory (PCM) devices was investigated. Discrete PCM devices employing $Ge_2Sb_2Te_5$ (GST) films as an active element were made in a pore-style configuration, and they were annealed at various temperatures ranging from 160 to $300^{\circ}C$. The behaviors of cell resistance change from SET resistance to RESET resistance were totally different according to the annealing temperatures. There was a critical annealing temperature for the fabrication of normal PCM devices and abnormal operations were observed in some devices annealed at temperatures lower or higher than the critical temperature. Those influences of annealing temperature seem closely related to the thermal stability of a top electrode/GST/heating layer multilayer structure in the PCM devices.

• IEMEK Journal of Embedded Systems and Applications
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• v.11 no.2
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• pp.117-123
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• 2016

In general, PCM (Phase Change Memory) is unsuitable as a main memory because it has limitations: high read/write latency and low endurance. However, the DRAM&PCM hybrid memory with the same level is one of the effective structures for a next generation main memory because it can utilize an advantage of both DRAM and PCM. Therefore, it needs an effective page management method for exploiting each memory characteristics dynamically and adaptively. So we aim reducing an access time and write count of PCM by using an effective page replacement. According to our simulation, the proposed algorithm for the DRAM&PCM hybrid can reduce the PCM access count by around 60% and the PCM write count by 42% given the same PCM size, compared with Clock-DWF algorithm.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.19.1-19.1
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• 2009

Phase change random access memory (PRAM)은 large sensing signal margin, fast programming speed, low operation voltage, high speed operation, good data retention, high scalability등을 가지는 가장 유망한 차세대 비휘발성 메모리이다. 현재 PRAM용 상변화 재료로는 주로 Ge2Sb2Te5가 사용되고 있지만 reset 전류가 높고 reliability 가 좋지 않아서 새로운 상변화 물질 연구가 필요하다. AgInSbTe (AIST)는 GST와 더불어 열에 의한 가역적 상변화를 하는 소재로 광기록 매체에서는 기록 속도가 빠르고 동작 특성이 우수하다는 특징이 있다. 본 연구에서는 XRD, 비저항측정등을 통해 온도에 따른 AIST의 물성 및 결정화 특성을 분석하고 나노 소자제작을 통해 그 전기적 특성을 평가하였다.

• Smart Structures and Systems
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• v.15 no.6
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• pp.1521-1542
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• 2015

The use of shape memory alloys (SMAs) in dynamical systems has an increasing importance in engineering especially due to their capacity to provide vibration reductions. In this regard, experimental tests are essential in order to show all potentialities of this kind of systems. In this work, SMA springs are incorporated in a dynamical system that consists of a one degree of freedom oscillator connected to a linear spring and a mass, which is also connected to the SMA spring. Two types of springs are investigated defining two distinct systems: a pseudoelastic and a shape memory system. The characterisation of the springs is evaluated by considering differential calorimetry scanning tests and also force-displacement tests at different temperatures. Free and forced vibration experiments are made in order to investigate the dynamical behaviour of the systems. For both systems, it is observed the capability of changing the equilibrium position due to phase transformations leading to hysteretic behaviour, or due to temperature changes which also induce phase transformations and therefore, change in stiffness. Both situations are investigated by promoting temperature changes and also pre-tension of the springs. This article shows several experimental tests that allow one to obtain a general comprehension of the dynamical behaviour of SMA systems. Results show the general thermo-mechanical behaviour of SMA dynamical systems and the obtained conclusions can be applied in distinct situations as in rotor-bearing systems.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.6
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• pp.448-453
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• 2019

This work reports the electrical characteristics of and temperature distribution in chalcogenide phase change memory (PCM) devices that have a self-aligned structure. GST (Ge-Sb-Te) chalcogenide alloy films were formed in a self-aligned manner by interdiffusion between sputter-deposited Ge and $Sb_2Te_3$ films during thermal annealing. A transmission electron microscopy-energy dispersive X-ray spectroscopy (TEM-EDS) analysis demonstrated that the local composition of the GST alloy differed significantly and that a $Ge_2Sb_2Te_5$ intermediate layer was formed near the $Ge/Sb_2Te_3$ interface. The programming current and threshold switching voltage of the PCM device were much smaller than those of a control device; this implies that a phase transition occurred only in the $Ge_2Sb_2Te_5$ intermediate layer and not in the entire thickness of the GST alloy. It was confirmed by computer simulation, that the localized phase transition and heat loss suppression of the GST alloy promoted a temperature rise in the PCM device.