• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.7-13
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• 2011

This paper presents a Time-to-Digital Converter which is a key block of an All-Digital Phase Locked Loop. In this work, a Vernier Delay Line is added in a conventional Gated Ring Oscillator, so it could get multi-phases and a high resolution. The Gated Ring Oscillator uses 7 unit delay cell, the Vernier Delay Line is used each delay cell. So proposed Time-to-Digital Converter uses total 21 phases. This Time-to-Digital Converter circuit is designed and laid out in $0.13{\mu}m$ 1P-6M CMOS technology. The proposed Time-to-Digital Converter achieves 26ps resolution, maximum input signal frequency is 100MHz and the digital output of proposed Time-to-Digital Converter are 8-bits. The proposed TDC detect 5ns phase difference between Start and Stop signal. A power consumption is 8.4~12.7mW depending on Enable signal width.

• Journal of Power Electronics
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• v.10 no.2
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• pp.203-209
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• 2010

This paper describes the development of a three-phase line-interactive DVR with a new sag detection algorithm. The developed detection algorithm has a hybrid structure composed of an instantaneous detector and RMS-variation detectors. The source voltage passes through the sliding-window DFT and RMS calculator, and the instantaneous sag detector. If an instantaneous sag is detected, the RMS variation detector-1 is selected to calculate the RMS variation. The RMS variation detector-2 is selected when the instantaneous sag occurs under the operation of the RMS variation detector-1. The feasibility of the proposed algorithm is verified through computer simulations and experimental work with a prototype of a line-interactive DVR with a 3kVA rating. The line-interactive DVR with the proposed algorithm can compensate for an input voltage sag or an interruption within a 2ms delay. The developed DVR can effectively compensate for a voltage sag or interruption in sensitive loads, such as computers, communications equipment, and automation equipment.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.8
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• pp.1-6
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• 1999

The only transmission characteristics in frequency domain is considered when using the tapered transmission line for wide-band impedance matching in MCM and MIC designs. In this paper, the distortion of an electrical pulse with rise/fall time resulting from dispersion and reflection as it propagates along a tapered microstrip line is investigated, and the delay time and distortion rate with respect to input and load impedances are analyzed on triangular and exponential tapered lines. A dispersion model of the phase constant proposed by Kirschning-Jansen is used to meet the frequency, accuracy and microstrip parametric requirements. The triangular tapered line shows both shorter delay time and higher distortion rate than those of the exponential tapered line. Furthermore, the amplitude of signal reflected from load point is calculated in time domain.

• Journal of information and communication convergence engineering
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• v.11 no.3
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• pp.147-152
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• 2013

A novel balun being the structure of a Wilkinson power divider is suggested and fabricated. One of the power dividing paths in the suggested balun uses a conventional ${\lambda}/4$ transmission line for $-90^{\circ}$ phase shifting, and the other path uses a composite right/left-handed -${\lambda}/4$ transmission line for $+90^{\circ}$ phase shifting with four series capacitors and three parallel inductors. In addition, the suggested balun uses two $50-{\Omega}$ resistors and a conventional $50-{\Omega}$ transmission line of ${\lambda}/2$ electrical length between the two output ports, achieving good isolation and reflection values of two balanced ports. The suggested balun is simulated by the advanced design system simulation program and fabricated on TLX-9 20-mil substrate. The fabricated balun has a very good values of $S_{11}$ = -27.46 dB, $S_{21}$ = -3.40 dB, and $S_{31}$ = -3.28 dB, a phase difference of $-179.5^{\circ}$, a magnitude difference of 0.12 dB, and a delay difference of 0.1 ns, with $S_{22}$ = -36.28 dB, $S_{33}$ = -27.19 dB, and $S_{32}$ = -25.2 dB at 1 GHz, respectively.

• Journal of the Korea Institute of Military Science and Technology
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• v.14 no.1
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• pp.114-122
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• 2011

In this paper, we have identified the system instability factors in a bistatic radar system using pulse chasing and considered their effects on the bistatic receiver's MTI(Moving Target Indication) improvement performance. The pulse chasing is a method to efficiently scan a restricted search area within the limited transmitter power and time in a bistatic radar and to track a series of transmitted pulses using the receiver beam which has ideally matched to the pulse propagation rate. In this paper, we have discussed the interrelationship between the pulse chasing and time and frequency/phase synchronization and described the effects of the identified system instability factors on two kinds of MTI filter configuration, single delay-line and double delay-line, in the bistatic radar. And also, we have confirmed that the overall system improvement is restricted by a lower improvement factor among identified them, and discussed the allowable tolerance of the time and frequency/phase synchronization in the bistatic system.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.2
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• pp.73-78
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• 2020

In this study, a novel reactive power control scheme is proposed to supply stable reactive power to the distribution line by compensating a ripple voltage of DC link. In a single-phase system, a magnitude of second harmonic is inevitably generated in the DC link voltage, and this phenomenon is further increased when the capacity of DC link capacitor decreases. Reactive power control was performed by controlling the d-axis current in the virtual synchronous reference frame, and the voltage control for maintaining the DC link voltage was implemented through the q-axis current control. The proposed method for compensating the ripple voltage was classified into three parts, which consist of the extraction unit of DC link voltage, high pass filter (HPF), and time delay unit. HPF removes an offset component of DC link voltage extracted from integral, and a time delay unit compensates the phase leading effect due to the HPF. The compensated DC voltage is used as feedback component of voltage control loop to supply stable reactive power. The performance of the proposed algorithm was verified through simulation and experiments. At DC link capacitance of 375 uF, the magnitude of ripple voltage decreased to 8 Vpp from 74 Vpp in the voltage control loop, and the total harmonic distortion of the current was improved.

• Journal of information and communication convergence engineering
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• v.3 no.3
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• pp.142-145
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• 2005

In this paper, a new programmable DLL (delay locked loop) based clock synthesizer is proposed. DLL has several inherent advantages, such as no phase accumulation error, fast locking and easy integration of the loop filter. This paper proposes a new programmable DLL that includes a PFD(phase frequency detector), a LSI(lock status indicator), and a VCDL(voltage controlled delay line) to generate multiple clocks. It can generate clocks from 3 to 9 times of input clock with $2{\mu}s$ locking time. The proposed DLL operating in the frequency range of 300MHZ-900MHz is verified by the HSPICE simulation with a $0.35{\mu}m$ CMOS process.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.4
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• pp.188-200
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• 2001

This paper presents a technique for reconstructing converter line currents using the information from a single current sensor in the DC-link for voltage-source PWM converters. When three-Phase input currents cannot be reconstructed, three methods to acquire the input current are compared. Two of them are methods of modifying the switching state (I, II), another is a method of using the predictive state observer. Also, compensation of sampling delay, and a simultaneous sample value of input currents in the center of a switching period are included. Suitable criteria for the comparison are identified, and the differences in the performance of these methods are investigated through experimental results for a typical V-S PWM converter rated at 10kVA.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.438-440
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• 2005

광위상변조기를 이용하여 OCT용 초고속 광지연단을 설계하고 수치해석을 수행하였다. 수치해석은 electro-optic 위상 변조기에 1310nm, 10ps의 펄스폭을 갖는 레이저 광원을 적용하여 수행하였다. 수치해석결과로 500MHz의 변조 주파수일때 19ps의 시간 지연을 얻었으며, 이는 기존의 기계적 검출방식(수십kHz)의 OCT장치에 비해 1000배이상 빠른 검출이 가능할 것으로 예상된다.

• Journal of The Korean Astronomical Society
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• v.28 no.2
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• pp.245-253
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• 1995

We have analyzed the time series of Ca II H,K and ${\lambda}8498$ line profiles taken for a sunspot (SPO 5007) with the Echelle spectrograph attached to Vacuum Tower Telescope at Sacramento Peak Solar Observatory. Each set of spectra was taken simultaneously for 20 minutes at a time interval of 30 seconds. A total of 40 photographic films for each line was scanned by a PDS at Korea Astronomy Observatory. The central peak intensity of Ca II H ($I_{max}$), the intensity measured at ${\Delta}{\lambda}=-0.1{\AA}$ from the line center of ${\lambda}8498(I_{{\lambda}8489})$, the radial velocity ($V_r$) and the Doppler width (${\Delta}{\lambda}_D$) estimated from Ca II H have been measured to study the dynamical behaviors of the sunspot chromosphere. Fourier analysis has been carried out for these measured quantities. Our main results are as follows: (1) We have confirmed the 3-minute oscillation being dominant throughout the umbra. The period of oscillations jumps from 180 sec in the umbra to 500 to 1000 sec in the penumbra. (2) The nonlinear character of the umbral oscillation is noted from the observed sawtooth shaped radial velocity fluctuations with amplitudes reaching up to $5{\sim}6\;km/sec$. (3) The spatial distribution of the maximum powers shows that the power of oscillations is stronger in the umbra than in the penumbra. (4) The spatial distributions of the time averaged < $I_{max}$ > and < $V_r$ > across the spot are found to be nearly axially symmetric, implying that the physical quantities derived from the line profiles of Ca II H and ${\lambda}8498$ are inherently associated with the geometry of the magnetic field distribution of the spot. (5) The central peaks of the CaII H emission core lead the upward motions of the umbral atmosphere by $90^{\circ}$, while no phase delay is found in intensities between $I_{max}$ and $I_{{\lambda}8498}$, suggesting that the umbral oscillation is of standing waves.