• Journal of Korean Society for Geospatial Information Science
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• v.22 no.1
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• pp.47-54
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• 2014

Precise Point Positioning (PPP) algorithms using GPS code pseudo-range measurements were developed and their accuracy was validated for the purpose of implementing them on a portable device. The group delay, relativistic effect, and satellite-antenna phase center offset models were applied as fundamental corrections for PPP. GPS satellite orbit and clock offsets were taken from the International GNSS Service official products which were interpolated using the best available algorithms. Tropospheric and ionospheric delays were obtained by applying mapping functions to the outputs from scientific GPS data processing software and Global Ionosphere Maps, respectively. When the developed algorithms were tested for four days of data, the horizontal and vertical positioning accuracies were 0.8-1.6 and 1.6-2.2 meters, respectively. This level of performance is comparable to that of Differential GPS, and further improvements and fine-tuning of this suite of PPP algorithms and its implementation at a portable device should be utilized in a variety of surveying and Location-Based Service applications.

• Journal of Advanced Navigation Technology
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• v.12 no.2
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• pp.122-131
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• 2008

In this paper, an S-band oscillator of the low phase noise property using miniaturized microstrip hairpin shaped ring resonator has been designed and implemented. The TACONIC's RF-35 substrate has a dielectric constant ${\varepsilon}_r$=3.5 a thickness h=20mil a copper thickness t=17 um and loss tangent $tan{\delta}$=0.0025. The designed and implemented 2.45 GHz oscillator shows low phase performance of -100.5 dBc/Hz a 100kHz offset. Output power 20.9 dBm at center frequency 2.45 GHz and harmonic suppression -32 dBc. The circuit was implemented with hybrid technique. But can be fully compatible with the RFIC's, MIC and MMIC due to its entirely planar structure.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.6 no.2
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• pp.702-721
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• 2012

In the DVB-T2 system with a multiple-input single-output (MISO) transmission mode, Alamouti coded orthogonal frequency division multiplexing (OFDM) signals are transmitted simultaneously from two spatially separated transmitters in a single frequency network (SFN). In such systems, each transmit-receive link may have a distinct carrier frequency offset (CFO) due to the Doppler shift and/or frequency mismatch between the local oscillators. Thus, the received signal experiences dual CFOs. This not only causes dual phase errors in desired data but also introduces inter-carrier interference (ICI), which cannot be removed completely by simply performing a CFO compensation. To overcome this problem, this paper proposes an iterative detection with dual phase errors compensation technique. In addition, we propose a successive-iterative ICI cancellation technique. This technique successively eliminates ICI in the initial iteration by exploiting pre-detected data pairs. Then, in subsequent iterations, it performs a fine interference cancellation using a priori information, iteratively fed back from the channel decoder. In contrast to previous works, the proposed techniques do not require estimates of dual CFOs. Their performances are evaluated via a full DVB-T2 simulator. Simulation results show that the DVB-T2 receiver equipped with the proposed dual phase errors compensation and the successive-iterative ICI cancellation techniques achieves almost the same performance as ideal dual CFOs-free systems, even for large dual CFOs.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.10
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• pp.109-117
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• 2004

In this paper, a K-band local oscillator composed of a VCDRO(Voltage Controlled Dielectric Resonator Oscillator), GaAs MESFET, and Reflector type frequency doubler has been designed and fabricated. TO obtain a good phase noise performance of a VCDRO, a active device was selected with a low noise figure and a low flicker noise MESFET and a dielectric resonator was used for selecting stable and high oscillation frequency. Especially, to have a higher conversion gain than a conventional doubler as well as a good harmonic suppression performance with circuit size reduced a doubler structure was employed as the Reflector type composed of a reflector and a open stub of quarter wave length for rejecting the unwanted harmonics. The measured results of fabricated oscillator show that the output power was 5.8 dBm at center frequency 12.05 GHz and harmonic suppression -37.98 dBc, Phase noise -114 dBc at 100 KHz offset frequency, respectively, and measured results show of fabricated frequency doubler, the output power at 5.8 dBm of input power is 1.755 dBm conversion gain 1.482 dB, harmonic suppression -33.09 dBc, phase noise -98.23 dBc at 100 KHz offset frequency, respectively. This oscillator could be available to a local oscillator in K-band which used frequency doubler techniques.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.4A
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• pp.214-218
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• 2012

In this paper, we reported on a high performance waveguide VCO(voltage controlled oscillator) for FMCW applications. The waveguide VCO consists of a GaAs Gunn diode, a varactor diode, and two bias posts with low pass filter(LPF). The cavity is designed for fundamental mode at 47 GHz and operated at second harmonic of 94 GHz center frequency. The developed waveguide VCO has 1.095 GHz bandwidth, 590 MHz linearity with 1.69% and output power from 14.86 to 15.93 dBm. The phase noise is under -95 dBc/Hz at 1 MHz offset.

• Journal of Institute of Control, Robotics and Systems
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• v.18 no.2
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• pp.149-155
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• 2012

This paper provides an efficient model predictive control for the output voltage control of three-phase inverter system which includes output LC filters. Use of SVPWM (Space Vector Pulse-Width-Modulation) and the rotating d-q frame is made to obtain an input constrained dynamic model of the inverter system. From the measured/estimated output current and reference output voltage, corresponding equilibrium values of the inductor current and the control input are computed. Derivation of a feasible and invariant set around the equilibrium state is made and then a receding horizon strategy which steers the current state deep into the invariant set is proposed. In order to remove offset error, use of disturbance observer is made in the form of state estimator. The efficacy of the proposed method is verified through simulations.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.3
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• pp.256-262
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• 2017

This paper presents the control algorithm of a single-phase AC/DC/AC PWM converter for the linear compressor of a refrigerator. The AC/DC/AC converter consists of a full-bridge PWM converter for the control of the input power factor and a half-bridge PWM inverter for the control of the single-phase linear compressor. At the DC-link of this topology, two capacitors are connected in series. These DC-link voltages must be balanced for safe operation. Thus, a new control method of DC voltage balancing for the half-bridge PWM inverter is proposed. The balancing algorithm uses the Integral-Proportional controller and inserts the DC-offset current at the Proportional-Resonant current controller of the inverter to solve the DC-link unbalanced voltages between the two capacitors. The proposed algorithm can be easily implemented without much computation and additional hardware circuit. The usefulness of the proposed algorithm is verified through several experiments.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.6
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• pp.691-699
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• 2012

In this paper, we present a Vt-DRO with a low phase noise, which is achieved by improving the coupling structure between the dielectric resonator and microstrip line. The Vt-DRO is a closed-loop type and is composed of 3 blocks; dielectric resonator, phase shifter, and amplifier. We propose a mathematical estimation method of phase noise, using the group delay of the resonator. By modifying the coupling structure between the dielectric resonator and microstrip line, we achieved a group delay of 53 nsec. For convenience of measurement, wafer probes were inserted at each stage to measure the S-parameters of each block. The measured S-parameter of the Vt-DRO satisfies the open-loop oscillation condition. The Vt-DRO was implemented by connecting the input and output of the designed open-loop to form a closed-loop. As a result, the phase noise of the Vt-DRO was measured as -132.7 dBc/Hz(@ 100 kHz offset frequency), which approximates the predicted result at the center frequency of 5.3 GHz. The tuning-range of the Vt-DRO is about 5 MHz for tuning voltage of 0~10 V and the power is 4.5 dBm. PFTN-FOM is -31 dBm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.8
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• pp.964-969
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• 2007

A regulated low phase noise differential colpitts VCO(Voltage Controlled Oscillator) for mobile RFID system is presented. The differential colpitts VCO meets the dense reader environment specifications. The VCO use a $0.35{\mu}m$ technology and achieves tuning range $1.55{sim}2.053 GHz$. Measuring 910 MHz frequency divider output, phase noise performance is -106 dBcMz and -135dBc/Hz at 40 kHz and 1MHz offset, respectively. 5-bit digital coarse-tuning and accumulation type MOS varactors allow for 28.2% tuning range, which is required to cover the LO frequency range of a UHF Mobile RFID system, Optimum design techniques ensure low VCO gain(<45 MHz/V) for good interoperability with the frequency synthesizer. To the author' knowledge, this differential colpitts VCO achieves a figure of merit(FOM) of 1.93dB at 2-GHz band.

• Journal of Semiconductor Engineering
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• v.1 no.1
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• pp.1-12
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• 2020

Handling precise timing in high-speed transceivers has always been a primary design target to achieve better performance. Many different approaches have been tried, and one of those is utilizing the beneficial nature of injection locking. Though the phenomenon was not intended for building integrated circuits at first, its coupling effect between neighboring oscillators has been utilized deliberately. Consequently, the dynamics of the injection-locked oscillator (ILO) have been explored, starting from R. Adler. As many aspects of the ILO were revealed, further studies followed to utilize the technique in practice, suggesting alternatives to the conventional frequency syntheses, which tend to be complicated and expensive. In this review, the historical analysis techniques from R. Adler are studied for better comprehension with proper notation of the variables, resulting in numerical results. In addition, how the timing jitter or phase noise in the ILO is attenuated from noise sources is presented in contrast to the clock generators based on the phase-locked loop (PLL). Although the ILO is very promising with higher cost effectiveness and better noise immunity than other schemes, unless correctly controlled or tuned, the promises above might not be realized. In order to present the favorable conditions, several strategies have been explored in diverse applications like frequency multiplication, data recovery, frequency division, clock distribution, etc. This paper reviews those research results for clock multiplication and data recovery in detail with their advantages and disadvantages they are referring to. Through this review, the readers will hopefully grasp the overall insight of the ILO, as well as its practical issues, in order to incorporate it on silicon successfully.