• Journal of Electrical Engineering and Technology
• /
• v.10 no.6
• /
• pp.2307-2314
• /
• 2015

In this paper, a discontinuous conduction mode (DCM) frequency control algorithm is proposed to reduce the input current ripple of a multi-phase interleaved boost converter. Unlike conventional variable duty and constant frequency control, the proposed algorithm controls the switching frequency to regulate the output voltage. By fixing the duty ratio at 1/N in the N-phase interleaved boost converter, the input current ripple can be minimized by ripple cancellation. Furthermore, the negative effects of the diode reverse recovery current are eliminated because of the DCM characteristic. A frequency controller is designed to employ the proposed algorithm considering the magnetic permeability change. The proposed algorithm is analyzed in the frequency domain and verified by a 600 W three-phase boost converter prototype that achieved 57% ripple current reduction.

• Journal of information and communication convergence engineering
• /
• v.5 no.4
• /
• pp.377-381
• /
• 2007

Nonlinear effects and chromatic dispersion are the main causes of pulse degradation in high bit-rate WDM transmission systems and several architectures have been proposed to compensate them by means of optical phase conjugation. In this paper, a new method to exploit an optical phase conjugator (OPC) for nonlinearity and dispersion cancellation is disclosed. The proposed method is using optimal total dispersion of each fiber sections and it is simpler than those previously described in literature. Power penalty between WDM channels and the maximum launch power in $28{\times}40$ Gbps WDM transmission system designed by optimal total dispersion are more decreased and more increased than those in the conventional WDM transmission system with OPC, respectively. Furthermore, optimal total dispersion proposed in this research should provide the flexible design of WDM system, which less depends on OPC position.

• Proceedings of the IEEK Conference
• /
• 2002.07c
• /
• pp.1952-1955
• /
• 2002

Multiple access interference (MAI) and multi path interference(MPI) degrades the system performance in the DS-CDMA(direct-sequence code-division multiple- access)systems .0 this paper, a generalized construction method fer 2$\^$n/(n=1,2,3) phase preferred pairs(PP) with zero-correlation duration (ZCD) of (0.5N+1) chips is proposed. 2$\^$n/(n=1,2,3) phase ZCD code sets with ZCD and enlarged family sizes are generated by carrying out a chip-shift operation of the preferred pairs . The properties of the proposed codes are effective for the cancellation of MAI and MPI in DS-CDMA Systems.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.19 no.6
• /
• pp.33-40
• /
• 1982

Although ultrasonic CT is one of the useful techniques for tissue characterization, the reconstructed images, such as the velocity distribution and attenuation constant distribution, are degraded by reflection and refraction of ultrasonic beam. This paper studied the degradation effects on attenuation images using agar gel phantoms which were developed to evaluate ultrasonic CT. We found that the reconstructed attenuation constants at the center of the phantoms were less than the actual values by 0.6 dB/cm when phantom velocity differs by 25 m/s from surrounding saline. We also studied a correction method for refraction and phase cancellation effects, where the correction was made using the maximum value in the received subdata, as obtained by sub-arraying microprobes located at each sampling point. Using this method, we could obtain an improvement in the reconstructed image by the correction on the attenuation effect.

• Journal of The Korean Astronomical Society
• /
• v.29 no.1
• /
• pp.9-18
• /
• 1996

We have analyzed vector magnetograms and $H\beta$ filtergrams of two sunspot groups, one in a growing phase and the other in a decaying phase. In this study, the temporal evolution of their magnetic morphology has been investigated in association with solar activity. The morphological variations of the growing and decaying phase of these sunspots revealed in detail the coalescence of small spots into a large spot and the fragmentation of a large spot into many small spots, respectively. Numerous small flares were detected in the spot group during the decaying phase. This seems to be intimately associated with the shearing motions of many spots with different polarities created by fragmentation of a large sunspot. The magnetic flux and the average shear angle are found to be substantially reduced during the decaying phase, especially in the course of the flarings. This implies that the decaying phase of the sunspot is, to some degree, involved with magnetic field cancellation. The growing spot group has not shown any large activities, but numerous small spots have grown into a typical bipolar sunspot.

• Journal of IKEEE
• /
• v.20 no.3
• /
• pp.314-317
• /
• 2016

Recently, efforts to maximize battery life in progress with an increase in the demand for portable devices. In this paper, we propose multi-phase buck converter with fast transient response. Multi-phase buck converter may be used for the output capacitor of small size because the ripple cancellation effect, it is possible to use an inductor having an inductance less. The portable device for quick change from standby mode to active 4-phase design structure was given a fast transient response. The proposed multi-phase buck converter was fabricated using a 0.18 um CMOS process and the supply voltage ranges from 2.7V to 3.3V, the maximum load current is 500mA and settling time is 10us.

• ETRI Journal
• /
• v.35 no.5
• /
• pp.935-938
• /
• 2013

This letter presents an algorithm for selecting a low delay for the modified discrete cosine transform (MDCT) and inverse MDCT (IMDCT). The implementation of conventional MDCT and IMDCT requires a 50% overlap-add (OLA) for a perfect reconstruction. In the OLA process, an algorithmic delay in the frame length is employed. A reduced overlap window and MDCT/IMDCT phase shifting is used to reduce the algorithmic delay. The performance of the proposed algorithm is evaluated by applying the low-delay MDCT to the G.729.1 speech codec.

• Proceedings of the KIPE Conference
• /
• 1997.07a
• /
• pp.269-275
• /
• 1997

This paper presents real time digital signal processor(DSP) control of UPS system feeding processor(DSP) control of UPS system feeding nonlinear loads to provide sinusoidal inverter output voltage. The control scheme is composed of an rms voltage compensator, the load current harmonics feed-forward loop for the cancellation of output voltage harmonics, and the output voltage harmonics feedback loop for system stability. The controller employs a Texas Instruments TMS320C40GFL50 DSP.

• Proceedings of the KIPE Conference
• /
• 1998.10a
• /
• pp.171-175
• /
• 1998

This paper proposes the advanced PWM method that can reduce common-mode voltage in three-phase PWM converter-inverter system. By the proper distribution of the zero-voltage vector of inverter, it is possible to cancel out a common-mode voltage pulse in a sampling period. Since the proposed PWM method maintains the effective-voltage vector, it does not affect the control performance of converter-inverter system. Without any extra hardware, overall common-mode voltage can be decreased by one-third compared with conventional PWM scheme.

• Proceedings of the KIEE Conference
• /
• 2007.04a
• /
• pp.286-288
• /
• 2007

In this paper, the fast locking PLL Frequency Synthesizer with low phase noise in a 0.18um CMOS process is presented. Its main application IS for the 915MHz ISM band wireless transponder upon the CPFSK (Continuous Phase Frequency Shift Keying) modulation scheme. Frequency synthesizer, which in this paper, is designed based on self-biased techniques and is independent with processing technology when damping factor and bandwidth fixed to most important parameters as operating frequency ratio, broad frequency range, and input phase offset cancellation. The proposed frequecy synthesizer, which is fully-integrated and is in 320M $^{\sim}$ 960MHz of the frequency range with 10MHz of frequency resolution. And its is implemented based on integer-N architecture. Its power consumption is 50mW at 1.8V of supply voltage and core area is $540{\mu}m$ ${\times}$ $450{\mu}m$. The measured phase noises are -117.92dBc/Hz at 10MHz offset, with low settling time less than $3.3{\mu}s$.