• Title/Summary/Keyword: Performance verification

Search Result 2,543, Processing Time 0.03 seconds

Design of Sliding Mode Fuzzy Controller for Vibration Reduction of Large Structures (대형구조물의 진동 감소를 위한 슬라이딩 모드 퍼지 제어기의 설계)

  • 윤정방;김상범
    • Journal of the Earthquake Engineering Society of Korea
    • /
    • v.3 no.3
    • /
    • pp.63-74
    • /
    • 1999
  • A sliding mode fuzzy control (SMFC) algorithm is presented for vibration of large structures. Rule-base of the fuzzy inference engine is constructed based on the sliding mode control, which is one of the nonlinear control algorithms. Fuzziness of the controller makes the control system robust against the uncertainties in the system parameters and the input excitation. Non-linearity of the control rule makes the controller more effective than linear controllers. Design procedure based on the present fuzzy control is more convenient than those of the conventional algorithms based on complex mathematical analysis, such as linear quadratic regulator and sliding mode control(SMC). Robustness of presented controller is illustrated by examining the loop transfer function. For verification of the present algorithm, a numerical study is carried out on the benchmark problem initiated by the ASCE Committee on Structural Control. To achieve a high level of realism, various aspects are considered such as actuator-structure interaction, modeling error, sensor noise, actuator time delay, precision of the A/D and D/A converters, magnitude of control force, and order of control model. Performance of the SMFC is examined in comparison with those of other control algorithms such as $H_{mixed 2/{\infty}}$ optimal polynomial control, neural networks control, and SMC, which were reported by other researchers. The results indicate that the present SMFC is an efficient and attractive control method, since the vibration responses of the structure can be reduced very effectively and the design procedure is simple and convenient.

  • PDF

One-Chip Multi-Output SMPS using a Shared Digital Controller and Pseudo Relaxation Oscillating Technique (디지털 컨트롤러 공유 및 Pseudo Relaxation Oscillating 기법을 이용한 원-칩 다중출력 SMPS)

  • Park, Young-Kyun;Lim, Ji-Hoon;Wee, Jae-Kyung;Lee, Yong-Keun;Song, Inchae
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.50 no.1
    • /
    • pp.148-156
    • /
    • 2013
  • This paper suggests a multi-level and multi-output SMPS based on a shared digital logic controller through independently operating in each dedicated time periods. Although the shared architecture can be devised with small area and high efficiency, it has critical drawbacks that real-time control of each DPWM generators are impossible and its output voltage can be unstable. To solve these problems, a real-time current compensation scheme is proposed as a solution. A current consumption of the core block and entire block with four driver buffers was simulated about 4.9mA and 30mA at 10MHz switching frequency and 100MHz core operating frequency. Output voltage ripple was 11 mV at 3.3V output voltage. Over/undershoot voltage was 10mV/19.6mV at 3.3V output voltage. The noise performance was simulated at 800mA and 100KHz load regulation. Core circuit can be implemented small size in $700{\mu}m{\times}800{\mu}m$ area. For the verification of proposed circuit, the simulations were carried out with Dong-bu Hitek BCD $0.35{\mu}m$ technology.

Comparison of adult CPR skill scores: Real-time visual feedback manikin(Resusci Anne SkillReporterTM) vs. Non-feedback manikin(Actar 911 SquadronTM) (성인 심폐소생술 술기 점수 비교: 레어달 애니 스킬리포터 대 액타 911 마네킹)

  • Kim, Jee-Hee;Moon, Tae-Young;Uhm, Tai-Hwan
    • The Korean Journal of Emergency Medical Services
    • /
    • v.15 no.2
    • /
    • pp.101-108
    • /
    • 2011
  • Purpose: Cardiopulmonary resuscitation (CPR) prevents tissue necrosis of the brain and cardiac muscle in the cardiac arrest patient and requires exact skills in order to increase survival rate. Through comparison of the training effects of feedback manikin and non-feedback manikin, this study present the effective CPR device to CPR instructors. Method: This CPR course for 80 students by using Resusci Anne $SkillReporter^{TM}$ (RASR; Laerdal Medical, Stavanger, Norway) and Actar 911 $Squadron^{TM}$ (A911; Vital Signs, New Jersey, USA) held on December 22, 2009. Thirty seven students and two assistants were placed in one laboratory, there were five RASR manikins which provide the LED performance indicator, not the metronome. Forty two students and two assistants were placed in the other laboratory, there were 20 A911 manikins which don't provide any feedback indicator. Chest compression scores and ventilation compression scores obtaining from two groups were analysed statistically by using independent t-test. Results: Chest compression scores, average depth (mm) was 37.5 in RASR and 41.80 A911 (p=.004), too depth (#) was 2.8 in RASR and 19.4 A911 (p=.005), average number per min (#/min) was 64.4 in RASR and 68.2 A911 (p=.038), wrong hand position (#/min) was 10.9 in RASR and 30.8 A911 (p=.040). Four items that showed better scores in group RASR had statistically significant difference. Ventilation compression scores, percent correct (%) was 40.6 in RASR and 20.6 A911 (p<.001), number correct (#) was 4.7 in RASR and 2.1 A911 (p=.002), too fast (#) was 0.9 in RASR and 2.9 A911 (p=.003), average volume (ml) was 536.5 in RASR and 707.1 A911 (p=.011). Also, three items that showed better scores in group RASR had statistically significant difference. Conclusions: Regarding the positive effect of CPR training feedback, comparison between the real-time visual feedback manikin (RASR) and the non-feedback manikin (A911) showed that RASR had better results than A911 in chest compression except average number per min (it means that we need harder chest manikin) and ventilation. Verification of the training effect in the real world such as CPR outcomes is also necessary. A proper application of manikin in training circumstances and research on retention of CPR skills will be needed.

Analysis on The Economic Impacts of Construction New Excellent Technology (건설신기술의 경제적 파급효과 분석)

  • Paek, Nam-Jong;Park, Hwan-Pyo;Lee, Kyo-Sun
    • Korean Journal of Construction Engineering and Management
    • /
    • v.12 no.1
    • /
    • pp.115-124
    • /
    • 2011
  • The Construction New Excellent Technology was introduced to promote the development of domestic construction technology and enhance national competitiveness, by inspiring the development desire of technology developers in 1989. Domestic Construction New Excellent Technology is first introduced in 1989, the total 596 cases were assigned to the new technology and it was used the construction site. Also, it was achieved the quantitative performance of thirty-hundred applications and was effected to the domestic construction industry. However, the systematic analysis about the introduction effects of Construction New Excellent Technology are none. Therefore, the quantitative analysis of economic effects in construction industry have to a justification in according to operation of Construction New Excellent Technology system and verification of superiority. And then, the Construction New Excellent Technology system needs a developing base in the future. In this study, The Economic Impacts of Construction New Excellent Technology were analyzed in quantitatively such as a cost savings effects, the employment effects, the effects on Value-added, the import substitution effects due to use of Construction New Excellent Technology. This study will be used promotion of economics and superiority in the Construction New Excellent Technology.

A Fitness Verification of Time Series Models for Network Traffic Predictions (네트워크 트래픽 예측을 위한 시계열 모형의 적합성 검증)

  • 정상준;김동주;권영헌;김종근
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.2B
    • /
    • pp.217-227
    • /
    • 2004
  • With a rapid growth in the Internet technology, the network traffic is increasing swiftly. As for the increase of traffic, it had a large influence on performance of a total network. Therefore, a traffic management became an important issue of network management. In this paper, we study a forecast plan of network traffic in order to analyze network traffic and to establish efficient correspondence. We use time series forecast models and determine fitness whether the model can forecast network traffic exactly. In order to predict a model, AR, MA, ARMA, and ARIMA must be applied. The suitable model can be found that can express the nature of traffic for the forecast among these models. We determines whether it is satisfied with stationary in the assumption step of the model. The stationary can get the results by using ACF(Auto Correlation Function) and PACF(Partial Auto Correlation Function). If the result of this function cannot satisfy then the forecast model is unsuitable. Therefore, we are going to get the correct model that is to satisfy stationary assumption. So, we proposes a way to classify in order to get time series materials to satisfy stationary. The correct prediction method is managed traffic of a network with a way to be better than now. It is possible to manage traffic dynamically if it can be used.

Design and Implementation of 8b/10b Encoder/Decoder for Serial ATA (직렬 ATA용 8b/10b 인코더와 디코더 설계 및 구현)

  • Heo Jung-Hwa;Park Nho-Kyung;Park Sang-Bong
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.1A
    • /
    • pp.93-98
    • /
    • 2004
  • Serial ATA interface Is inexpensive comparatively and performance is superior. So it is suitable technology in demand that now require data transmission and throughput of high speed. This paper describes a design and implementation of Serial ATA Link layer about error detection and 8b/10b encoder/decoder for DC balance in frequency 150MHz. The 8b/10b Encoder is partitioned into a 5b/6b plus a 3b/4b coder. The logical model of the block is described by using Verilog HDL at register transistor level and the verified HDL is synthesized using standard cell libraries. And it is fabricated with $0.35{\mu}m$ Standard CMOS Cell library and the chip size is about $1500{\mu}m\;*\;1500{\mu}m$. The function of this chip has been verified and tested using testboard with FPGA equipment and IDEC ATS2 test equipment. It is used to frequency of 100MHz in verification processes and supply voltage 3.3V. The result of testing is well on the system clock 100MHz. The designed and verified each blocks may be used IP in the field of high speed serial data communication.

System Performance Improvement of IEEE 802.15.3a By Using Time Slot Synchronization In MAC Layer (UWB MAC의 Time Slot 동기를 통한 시스템 성능 개선)

  • Oh Dae-Gun;Chong Jong-Wha
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.43 no.3 s.345
    • /
    • pp.84-94
    • /
    • 2006
  • In this paper, we propose the algorithm to reduce guard time of UWB MAC time slot for throughput gain. In the proposed draft by multiband ofdm alliance (MBOA), Guard time of each medium access slot (MAS) is composed of shortest inter-frame space (SIFS) and MaxDrift which is the time caused by maximum frequency offset among devices. In this paper, to reduceguard time means that we nearly eliminate MaxDrift term from guard time. Each device of a piconet computes relative frequency offset from the device initiating piconet using periodically consecutive transferred beacon frames. Each device add or subtract the calculated relative frequency offset to the estimated each MAS starting point in order to synchronize with calculated MAS starting point of the device initiating piconet. According to verification of simulations, if the frequency offset estimator is implemented with 8 decimal bit, the ratio of the wasted time to Superframe is always less than 0.0001.

Experimental Verification of Flexural Response for Strengthened R/C Beams by Stirrup Partial-Cutting Near Surface Mounted Using CFRP Plate (CFRP 플레이트 적용 스터럽 부분절단형 표면매립공법으로 보강된 철근콘크리트 보의 휨 거동에 대한 실험적 평가)

  • Oh, Hong-Seob;Sim, Jong-Sung;Ju, Min-Kwan;Lee, Gi-Hong
    • Journal of the Korea Concrete Institute
    • /
    • v.20 no.6
    • /
    • pp.671-679
    • /
    • 2008
  • The near surface mounted (NSM) FRP strengthening method has been conventionally applied for strengthening the deteriorated concrete structures. The NSM strengthening method, however, has been issued with the problem of limitation of the cutting depth which is usually considered as concrete cover depth. This may be related with degradation of bonding performance in long-term service state. To improve the debonding problem, in this study, the Stirrup partial-cutting NSM (SCNSM) strengthening method using CFRP plate was newly developed. SCNSM strengthening method can be effectively applied to the deteriorated concrete structure without any troubles of insufficient cutting depth. To experimentally verify the structural behavior, the flexural test of the concrete beam by using the SCNSM strengthening method was conducted with the test variable as the strengthening length (32%, 48%, 70%, 80%, 96% of span length). In the result of the test, the NSM and SCNSM strengthened specimen showed similar structural behavior with load-deflection, mode of failure. Additionally, there was no apparent structural degradation by the stirrup partial-cutting. Consequently, it was evaluated that the SCNSM strengthening method can be useful for seriously damaged concrete structures that is hard to apply the conventional NSM strengthening method for increasing the structural capacity.

Performance Evaluation of the MAC Protocols for WDM Metro Ring with Wavelength-Shared Nodes Connecting Broadband Access Networks (대역 액세스 망을 연결하는 파장 공유 노드 기반 WDM 메트로 링의 MAC 프로토콜 성능 평가)

  • So Won-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.43 no.1 s.343
    • /
    • pp.111-120
    • /
    • 2006
  • In this paper, a node architecture of WDM metro network for connecting broadband access networks to converge wire/wireless networks. In consideration of the proposed node architecture and network requirements we proposed and evaluated medium access control protocols. We review WDM related technologies of sub-carrier multiplexing and optical components in order to resolve the bottleneck between optical backbone networks md access networks, and a access node architecture sharing common wavelength is introduced. Source-stripping (SS) MAC protocol Is evaluated under the proposed functional node architecture. DS+IS (Destination-Stripping and Source-Stripping) and DS+IS (Destination-Stripping and Intermediate-Stripping) MAC protocols are described to increase the slot-reuse factor which is low on SS MAC protocol. The key function of new MAC protocols regards the optical switch module of proposed node architecture and helps intermediate or source access nodes for dropping slots to destinations of different wavelength group. Thus, slot-reuse factor increases as the MAC protocols reduce the unnecessary ring-rotation of transferred slots. We use a numerical analysis to expect bandwidth efficiency and maximum throughput by slot-reuse factor Throughput network simulation, the verification of throughput, queuing delay, and transmission fairness are compared among MAC protocols.

A design and implementation of Face Detection hardware (얼굴 검출을 위한 SoC 하드웨어 구현 및 검증)

  • Lee, Su-Hyun;Jeong, Yong-Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.44 no.4
    • /
    • pp.43-54
    • /
    • 2007
  • This paper presents design and verification of a face detection hardware for real time application. Face detection algorithm detects rough face position based on already acquired feature parameter data. The hardware is composed of five main modules: Integral Image Calculator, Feature Coordinate Calculator, Feature Difference Calculator, Cascade Calculator, and Window Detection. It also includes on-chip Integral Image memory and Feature Parameter memory. The face detection hardware was verified by using S3C2440A CPU of Samsung Electronics, Virtex4LX100 FPGA of Xilinx, and a CCD Camera module. Our design uses 3,251 LUTs of Xilinx FPGA and takes about 1.96${\sim}$0.13 sec for face detection depending on sliding-window step size, when synthesized for Virtex4LX100 FPGA. When synthesized on Magnachip 0.25um ASIC library, it uses about 410,000 gates (Combinational area about 345,000 gates, Noncombinational area about 65,000 gates) and takes less than 0.5 sec for face realtime detection. This size and performance shows that it is adequate to use for embedded system applications. It has been fabricated as a real chip as a part of XF1201 chip and proven to work.