• Proceedings of the IEEK Conference
• /
• 2002.06b
• /
• pp.297-300
• /
• 2002

Application of electronic nose and PLD chip design was developed to be used in gas discrimination system for limited kinds of gas. An array of 4 metal oxide gas sensors with different selectivity patterns were used in order to measure gases. BP(Back Propagation) algorithm was designed and implemented on CPLD of two hundred thousand gate level chips by VHDL language for processing input signals from 4 kinds of gas sensors. This module successfully discriminated 4 kinds of gases and displayed the results on LCD and LED. The developed module could be used for various applications in the field of food process control and alcohol judgment.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.32B no.3
• /
• pp.66-76
• /
• 1995

In this research, a mesh connected VLSI structure is proposed for the real time computation of the generalized Hough transform(GHT). The purpose of the research is to design a generalized Hough transformer that can be realized as a single chip processor. The GHT has been modified to yield a highly parallel structure consisting of simple processing elements(PEs) and communication networks. In the proposed structure, the GHT can be computed by first assigning an image pixel to a PE and performing shift and add operations. The result of the CAD circuit simulation shows that it can be computed in the time proportional to the number of pixels in the pattern. In addition to the Hough transformer, the peak detector has been designed to reduce 1)the number of the I/O operations between the transformer and the host computer and 2) the host computer's burden for peak detection by transmitting only the local peaks detected from the transformed accumulator. It is expected that the proposed single chip Hough transformer with peak detector makes a fast and inexpensive edge based object recognition systems possible for many industrial and military applications.

• Journal of the Korea Society for Simulation
• /
• v.17 no.2
• /
• pp.13-19
• /
• 2008

New Buffered deposition is proposed to decrease junction electric field in this paper. Buffered deposition process is fabricated after first gate etch, followed NM1 ion implantation and deposition & etch nitride layer. New Buffered deposition structure has buffer layer to decrease electric field. Also we compared the hot carrier characteristics of Buffered deposition and conventional. Also, we design a test pattern including NMOSFET, PMOSFET, LvtNMOS, High pressure N/PMOSFET, so that we can evaluate DC/AC hot carrier degradation on-chip. As a result, we obtained 10 years hot carrier life time satisfaction.

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2001.09a
• /
• pp.183-192
• /
• 2001

1- Buildup PCB technology is utilized to a bare chip attach substrate technology for packaging of semiconductor chip 2- Requirement for the substrate design rule is described in SIA International Technology Roadmap for Semiconductor. 3- There are seven fabrication methods of build-up technology. 4- Coating and lamination for resin and photo, and laser for micro via hope processes are available. Below $50\mu\textrm{m}$ in diameter is possible. 5- Fine pitch lines down to $30\mu\textrm{m}$ can be achieved by pattern plating with better electrical property. 6- Dielectric loss reduction is a key material improvement item for next generation build-up technology. 7- High band width up to 512 GB/s is possible with current wiring groundrule.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.15 no.6
• /
• pp.494-505
• /
• 1990

This paper reports on the development of a DPSK demodulator of DS spread spectrum communications that use one SAW convolver. The spreading code chip pattern is changed from bit to bit in data portion of packet. And code chip is PSK modulated. Compared with simulation, experiment shows that the DPSK signal spreaded can be demodulated by using only one SAW convolver. And the theoretical performance of this DPSK demudulator is equal to CSK demodulator wich uses two SAW convolvers.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.1
• /
• pp.20-27
• /
• 2008

In this paper, a nonlinear classifier of a feed-forward neural network is implemented on an FPGA chip. The feedforward neural network is implemented in hardware for fast parallel processing. After off line training of neural network, weight values are saved and used to perform forward propagation of neural processing. As an example, AND and XOR digital logic classification is conducted in off line, and then weight values are used in neural network. Experiments are conducted successfully and confirmed that the FPGA neural network hardware works well.

• Korean Journal of Optics and Photonics
• /
• v.18 no.2
• /
• pp.111-116
• /
• 2007

A high power LED which is being used in many illumination applications as a new light source was simulated for its physical structure and then its optical properties were analyzed. To obtain accurate results from the designed LED model, properties of the die chip and reflector cup were varied. As a result, a high power LED model which has a radiation pattern of a Lambertian with its viewing angle of approximately $140^{\circ}$ and total included angle of $160^{\circ}$ was designed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2010.05a
• /
• pp.775-778
• /
• 2010

본 논문에서는 초미세 패턴($24{\mu}m$ 이하의 선폭, $30{\mu}m$ 이하의 피치)을 가진 칩-온-필름(Chip-on-Film, COF)에 발생한 결함을 자동으로 검출할 수 있는 시스템을 제안한다. 개발된 시스템은 COF 패턴으로부터 대표적으로 발생하는 결함들, 즉 개방(open), 단락(hard short), mouse bite(near open) 및 near short(soft short)을 자동으로 신속히 검출할 수 있는 기술이 적용되어 있다. 특히 초미세 패턴의 경우, near open 및 near short과 같은 결함 검출이 불가능한 기존 검출시스템의 문제점을 극복한 기술이 제안되어 있다. 본 논문에서 제안하는 결함 검출 원리는 미세 선의 결함유무에 따른 저항 변화를 자동으로 검출하고, 그 미세한 변화를 좀 더 자세하게 판별하기 위해 고주파 공진기(resonator)를 적용하고 있다. 제안된 시스템은 미세 패턴을 가진 COF 제작 과정에서 발생한 결함을 신속히 검출할 수 있기 때문에 COF 불량 검사에 소요되는 많은 경비를 줄일 수 있으리라 기대한다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2006.06a
• /
• pp.386-387
• /
• 2006

This research describes a new constructing method of multifunctional biosensor using many kinds of biomaterials. A metal particle and an array was fabricated by photolithographic. Biomaterials were immobilized on the metal particle. The array and the particles were mixed in a buffer solution, and were arranged by magnetic force interaction and self-assembly. A quarter of total Ni dots were covered by the particles. The binding direction of the particles was controllable, and condition of particles was almost with Au surface on top. The particles were successfully arranged on the array. The biomaterial activities were detected by chemiluminescence and electrochemical methods.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2012.11a
• /
• pp.197-199
• /
• 2012

Recently, a lot of general-purpose application programs in addition to graphic applications have been parallelized for boosting their performance using Graphic Processing Unit (GPU)'s excellent floating-point performance. In order to maximize the application performance on GPUs, optimizing the memory hierarchy and the on-chip caches such as the shared memory is essential. In this paper, we propose techniques to optimize the shared memory, and verify its effectiveness using a pattern matching application program.