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A Study on Perspectives of the National Assembly Larchiveum: Focused on Discussion about Collaborative Strategies of Memory Institutions (국회 라키비움의 전망에 관한 연구 - 기억기관 협력 정책에 관한 논의를 중심으로 -)

  • Kim, You-Seung
    • Journal of Korean Society of Archives and Records Management
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    • v.12 no.2
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    • pp.93-115
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    • 2012
  • The National Assembly and its institutions have heavy duties to the nation. Knowledge and information resources which they produce, manage and preserve are part of history and evidence of democracy. Therefore, activities for systematic management and long-term preservation of the resources are important tasks at a national level. However, organizational status of the institutions, which are in charge of management and preservation of the resource, are not in accord with their responsibilities. In this context, this study aims at analyzing necessary and sufficient conditions for establishing the National Assembly Larchiveum and at exploring possible strategies. The study conducts literature reviews concerning necessities, procedures, and success factors of collaboration. Futhermore it analyzes various cases and divides them into several types based on collaborative levels and geographical categories. Based on these theoretical discourse the study discuss the history of the National Assembly's memory institutions and obstacles to their collaboration. As a result, it provides alternative strategies for establishing the National Assembly Larchiveum.

Comparisons of Parallel Preconditioners for the Computation of Interior Eigenvalues by the Minimization of Rayleigh Quotient (레이레이 계수의 최소화에 의한 내부고유치 계산을 위한 병렬준비행렬들의 비교)

  • Ma, Sang-back;Jang, Ho-Jong
    • The KIPS Transactions:PartA
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    • v.10A no.2
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    • pp.137-140
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    • 2003
  • Recently, CG (Conjugate Gradient) scheme for the optimization of the Rayleigh quotient has been proven a very attractive and promising technique for interior eigenvalues for the following eigenvalue problem, Ax=λx (1) The given matrix A is assummed to be large and sparse, and symmetric. Also, the method is very amenable to parallel computations. A proper choice of the preconditioner significantly improves the convergence of the CG scheme. We compare the parallel preconditioners for the computation of the interior eigenvalues of a symmetric matrix by CG-type method. The considered preconditioners are Point-SSOR, ILU (0) in the multi-coloring order, and Multi-Color Block SSOR (Symmetric Succesive OverRelaxation). We conducted our experiments on the CRAY­T3E with 128 nodes. The MPI (Message Passing Interface) library was adopted for the interprocessor communications. The test matrices are up to $512{\times}512$ in dimensions and were created from the discretizations of the elliptic PDE. All things considered the MC-BSSOR seems to be most robust preconditioner.

A Study on the Image and Characteristics of the Group Study Room at University (대학교 그룹스터디룸 이미지 및 특성에 관한 연구)

  • Wei, Han-Bin;Shin, Eun-Kyung;Kim, Sei-Yong
    • Journal of the Korean Institute of Educational Facilities
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    • v.22 no.1
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    • pp.13-23
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    • 2015
  • Currently, the group study becomes the most popular method and common custom for learning in public that is distinctly different from the preferred way of self-study in the last decades. As a result, the college and public facilities have been significantly changed to provide more and more new spaces for discussion, learning and sharing information with others as one of the remarkable improvements and advantages. On the other hands, library is one of the all-important public sites to obtain information and knowledge for students. Moreover, we can split out an individual space from the reading rooms to take part in the group activities such as group meetings and academic exchanges. Recently, several universities begin to recognize the value of group study and try to meet the research needs. Also, needs for students, and the group study rooms are applied into the new buildings and rebuilt ones under this background. In this study, It focuses on analyzing of the 134 group study rooms to investigate the variations in universities and classify the types of buildings with site researches through 14 indicators of indoor environments. To investigate different types of group study rooms, we use the SD method to analyze the findings. So far there is no research focusing on the study rooms, especially for the analysis of their types and indoor environments features. Therefore, this article can provide a theoretical basis and evidence to related researches; also can help us to improve indoor environments to offer a better learning environments for the students in the future.

A Study on the Efficient Configuration Thread Control Modeling in Version Control using Object Oriented System (객체지향 시스템을 이용한 버전제어에서 효율적인 형상 형성 제어 모델링에 관한 연구)

  • Oh, Sang-Yeob
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.4 s.36
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    • pp.123-132
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    • 2005
  • A version control system is used in a rapidly changed environment or a program which developed in a complicated environment. And configuration thread information supporting and it's processing method has an important part in version control. Configuration thread tool such as a system model of DSEE, a view of ClearCase, a label of SourceSafe, and the package of CCC/Harvest have applied to formalized configuration rule by user and obtained a desired configuration information of the version. But it is a problem of configuration thread in supporting information that we. in this method. can't know a exactly well-defined configuration rule information and a predefined information. And these information have a demerit that can't supported the close connection along with undefined version and a meta-information. In this paper. we have modeling a system for these problems to solve and a efficiently configuration thread supported. We also proposed a mixed retrieval model included a boolean retrieval model and a vector retrieval model for support efficiently configuration thread information. We applied and designed the libraries using extended facet method.

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Transformation from Legacy Application Class to JavaBeans for Component Based Development (컴포넌트 기반 개발을 위한 기존 애플리케이션 클래스의 JavaBean으로의 변환)

  • Kim, Byeong-Jun;Kim, Ji-Yeong;Kim, Haeng-Gon
    • The KIPS Transactions:PartD
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    • v.9D no.4
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    • pp.619-628
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    • 2002
  • Reusable software component is an ultimate goal for the software development. Component based development is focused on advanced concepts rather than passive manipulation or class library with source codes. However, the primary component construction in component based development lead to an additional development cost and effort for reconstructing the new software component within a component model. Java application provides several features based on component model. But, we only have an opportunity to develop the smallest reuse units or the restricted set of GUI components. It cannot contributed as a component and only used in the specific domain component with high cost and efforts. In this paper, we apply java component model to the existing java application and extract javabeans through extending the component scalability. We also discuss the algorithm for transformation mechanism from legacy class to javabeans with a partial of business logic.

A FPGA Implementation of BIST Design for the Batch Testing (일괄검사를 위한 BIST 설계의 FPGA 구현)

  • Rhee, Kang-Hyeon
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.7
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    • pp.1900-1906
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    • 1997
  • In this paper, the efficient BILBO(named EBILBO) is designed for BIST that is able to batch the testing when circuit is designed on FPGA. The proposed algorithm of batch testing is able to test the normal operation speed with one-pin-count that can control all part of large and complex circuit. PRTPG is used for the test pattern and MISR is used for PSA. The proposed algorithm of batch testing is VHDL coding on behavioral description, so it is easily modified the model of test pattern generation, signature analysis and compression. The EBILBO's area and the performance of designed BIST are evaluated with ISCAS89 benchmark circuit on FPGA. In circuit with above 600 cells, it is shown that area is reduced below 30%, test pattern is flexibly generated about 500K and the fault coverage is from 88.3% to 100%. EBILBO for the proposed batch testing BIST is able to execute concurrently normal and test mode operation in real time to the number of $s+n+(2^s/2^p-1)$ clock(where, in CUT, # of PI;n, # of register, p is order # of polynomial). The proposed algorithm coded with VHDL is made of library, then it well be widely applied to DFT that satisfy the design and test field on sme time.

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Design of High-performance Pedestrian and Vehicle Detection Circuit using Haar-like Features (Haar-like 특징을 이용한 고성능 보행자 및 차량 인식 회로 설계)

  • Kim, Soo-Jin;Park, Sang-Kyun;Lee, Seon-Young;Cho, Kyeong-Soon
    • The KIPS Transactions:PartA
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    • v.19A no.4
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    • pp.175-180
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    • 2012
  • This paper describes the design of high-performance pedestrian and vehicle detection circuit using the Haar-like features. The proposed circuit uses a sliding window for every image frame in order to extract Haar-like features and to detect pedestrians and vehicles. A total of 200 Haar-like features per sliding window is extracted from Haar-like feature extraction circuit and the extracted features are provided to AdaBoost classifier circuit. In order to increase the processing speed, the proposed circuit adopts the parallel architecture and it can process two sliding windows at the same time. We described the proposed high-performance pedestrian and vehicle detection circuit using Verilog HDL and synthesized the gate-level circuit using the 130nm standard cell library. The synthesized circuit consists of 1,388,260 gates and its maximum operating frequency is 203MHz. Since the proposed circuit processes about 47.8 $640{\times}480$ image frames per second, it can be used to provide the real-time detection of pedestrians and vehicles.

Energy-Efficient and Parameterized Designs for Fast Fourier Transform on FPGAs (FPGA에서 FFT(Fast Fourier Transform)를 구현하기 위한 에너지 효율적이고 변수화 된 설계)

  • Jang Ju-Wook;Han Woo-Jin;Choi Seon-Il;Govindu Gokul;Prasanna Viktor K.
    • The KIPS Transactions:PartA
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    • v.13A no.2 s.99
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    • pp.171-176
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    • 2006
  • In this paper, we develop energy efficient designs for the Fast Fourier Transform (FFT) on FPGAs. Architectures for FFT on FPGAs are designed by investigating and applying techniques for minimizing the energy dissipation. Architectural parmeters such as degrees of vertical and horizontal parallelism are identified and a design choices. We determine design trade-offs using high-level performance estimation to obtain energy-efficient designs. We implemented a set storage types as parameters, on Xilinx Vertex-II FPGA to verify the estimates. Our designs dissipate 57% to 78% less energy than the optimized designs from the Xilinx library. In terms of a comprehensive metric such as EAT (Energy-Area-Time), out designs offer performance improvements of 3-13x over the Xilinx designs.

Low Area Hardware Design of Efficient SAO for HEVC Encoder (HEVC 부호기를 위한 효율적인 SAO의 저면적 하드웨어 설계)

  • Cho, Hyunpyo;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.1
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    • pp.169-177
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    • 2015
  • This paper proposes a hardware architecture for an efficient SAO(Sample Adaptive Offset) with low area for HEVC(High Efficiency Video Coding) encoder. SAO is a newly adopted technique in HEVC as part of the in-loop filter. SAO reduces mean sample distortion by adding offsets to reconstructed samples. The existing SAO requires a great deal of computational and processing time for UHD(Ultra High Definition) video due to sample by sample processing. To reduce SAO processing time, the proposed SAO hardware architecture processes four samples simultaneously, and is implemented with a 2-step pipelined architecture. In addition, to reduce hardware area, it has a single architecture for both luma and chroma components and also uses optimized and common operators. The proposed SAO hardware architecture is designed using Verilog HDL(Hardware Description Language), and has a total of 190k gates in TSMC $0.13{\mu}m$ CMOS standard cell library. At 200MHz, it can support 4K UHD video encoding at 60fps in real time, but operates at a maximum of 250MHz.

Work-Related Musculoskeletal Disorders in Iranian Dentists: A Systematic Review and Meta-analysis

  • ZakerJafari, Hamid Reza;YektaKooshali, Mohammad Hossein
    • Safety and Health at Work
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    • v.9 no.1
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    • pp.1-9
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    • 2018
  • Background: Work-related musculoskeletal disorders are the most important problems among professions particularly, dentists. This study was conducted to determine the prevalence of musculoskeletal disorders in various parts of the body in Iranian dentists by using systematic review and meta-analysis. Methods: This systematic review and meta-analysis was based on preferred reporting items for systematic reviews and meta-analyses (PRISMA) guidelines and searching in national databases such as SID, Magiran, Irandoc, IranMedex, and Medlib, and international databases such as MedLine, Web of Sciences, Scopus, PubMed, ScienceDirect, Cochrane, Embase, Springer, Wiley Online Library, Ebsco, CEBM, and Google Scholar search engine which were published by January 1, 2017. Researched keywords were in Persian and their standard English equivalents were in accordance with their MeSH. The obtained documents were analyzed using Comprehensive Meta-analysis version 2. Results: According to 23 studies through 2,531 Iranian dentists which took part in this study, prevalence of skeletal disorders in Iranian dentists has been 17.6% [confidence interval (CI) 95%:11.7-25.5] in knees, 33.2% (CI 95%:24.1-43.8) in shoulders, 33.4% (CI 95%: 26.8-40.8) in the thorax, 51.9% (CI 95%:46.7-57.2) in necks, 33.7% (CI 95%:28.2-39.6) in wrists/hands, 12.9% (CI 95%:7.7-20.6) in elbows, 37.3% (CI 95%: 31.5-43.5) in lower back, 11.9% (CI 95%:8.7-16.1) in thighs, 12.9% (CI 95%:3.8-36) in the foot, and 10.5% (CI 95%:7-15.4) in legs. Conclusion: Considering the high prevalence of musculoskeletal disorders in Iranian dentists, ergonomics should be included as a lesson in preclinic and also, reeducation courses for ergonomics basics should be executed for graduate dentists.