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http://dx.doi.org/10.3745/KIPSTA.2012.19A.4.175

Design of High-performance Pedestrian and Vehicle Detection Circuit using Haar-like Features  

Kim, Soo-Jin (한국외국어대학교 전자공학과)
Park, Sang-Kyun (한국외국어대학교 전자공학과)
Lee, Seon-Young (전자부품연구원 SoC플랫폼센터)
Cho, Kyeong-Soon (한국외국어대학교 전자공학과)
Publication Information
The KIPS Transactions:PartA / v.19A, no.4, 2012 , pp. 175-180 More about this Journal
Abstract
This paper describes the design of high-performance pedestrian and vehicle detection circuit using the Haar-like features. The proposed circuit uses a sliding window for every image frame in order to extract Haar-like features and to detect pedestrians and vehicles. A total of 200 Haar-like features per sliding window is extracted from Haar-like feature extraction circuit and the extracted features are provided to AdaBoost classifier circuit. In order to increase the processing speed, the proposed circuit adopts the parallel architecture and it can process two sliding windows at the same time. We described the proposed high-performance pedestrian and vehicle detection circuit using Verilog HDL and synthesized the gate-level circuit using the 130nm standard cell library. The synthesized circuit consists of 1,388,260 gates and its maximum operating frequency is 203MHz. Since the proposed circuit processes about 47.8 $640{\times}480$ image frames per second, it can be used to provide the real-time detection of pedestrians and vehicles.
Keywords
Haar-like Features; AdaBoost; Pedestrian and Vehicle Detection; Real-time Processing;
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  • Reference
1 Y. Freund and R. E. Schapire, "A Decision-theoretic Generalization of Online Learning and an Applications to Boosting," Journal of Computer Vision and Pattern Recognition, pp.886-893, 2005.
2 Z. Sun, et al., "On-road Vehicle Detection: A Review." IEEE Trans. on Pattern Analysis and Machine Intelligence, Vol.28, No.5, pp.649-711, May, 2006.
3 P. Dollar, et al., "Pedestrian Detection a Benchmark," in Proceedings of IEEE Conference on Computer Vision and Pattern Recognition, pp.304-311, Jun., 2009.
4 Junguk Cho, et al., "Parallelized Architecture of Multiple Classifiers for Face Detection," in Proceedings of IEEE International Conference on Application-specific Systems, Architecture and Processors, pp.75-82, Jul., 2009.
5 C. Kyrkyou and T. Theocharides, "A Flexible Parallel Hardware Architecture for AdaBoost-based Real-time Object Detection," IEEE Trans. on VLSI Systems, pp.1034-1047, Jun., 2011.
6 P. Viola and M. Jones, "Rapid Object Detection using a Boosted Cascade of Simple Features," in Proceedings of IEEE Conference on Computer Vision and Pattern Recognition, Vol.1, pp.511-518, Dec., 2001.