• Transactions of the Korean Society of Mechanical Engineers
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• v.19 no.9
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• pp.2194-2205
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• 1995

In order to reduce the systematic error of a build-up system, we have proposed a new test procedure in which all force transducers in a build-up system are rotated by 90.deg. with a base platen fixed on a force standard machine. The setting positions of force transducers on the output of a build-up system were investigated using an orthogonal array. The effects of the parallelism of a build-up system and of the bending moment sensitivity of a force transducer were considered. The experimental results show that the setting position of the base platen hardly affects the output of the build-up system, but the setting positions of force transducers affects it strongly. It reveals that the new test procedure reduces effectively the systematic error of a build-up system.

• Journal of applied mathematics & informatics
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• v.11 no.1_2
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• pp.305-316
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• 2003

Recently, an iterative algorithm for finding the interior eigenvalues of a definite matrix by CG-type method has been proposed. This method compares to the inverse power method. The given matrices A, and B are assumed to be large and sparse, and SPD( Symmetric Positive Definite) The CG scheme for the optimization of the Rayleigh quotient has been proven a very attractive and promising technique for large sparse eigenproblems for smallest eigenvalue. Also, it is very amenable to parallel computations, like the CG method for the linear systems. A proper choice of the preconditioner significantly improves the convergence of the CG scheme. But for parallel computations we need to find an efficient parallel preconditioner. Our candidates we ILU(0) in the wave-front order, ILU(0) in the multi-coloring order, Point-SSOR(Symmetric Successive Overrelaxation), and Multi-Color Block SSOR preconditioner. Wavefront order is a simple way to increase parallelism in the natural order, and Multi-coloring realizes a parallelism of order(N), where N is the order of the matrix. Another choice is the Multi-Color Block SSOR(Symmetric Successive OverRelaxation) preconditioning. Block SSOR is a symmetric preconditioner which is expected to minimize the interprocessor communication due to the blocking. We implemented the results on the CRAY-T3E with 128 nodes. The MPI (Message Passing Interface) library was adopted for the interprocessor communications. The test problem was drawn from the discretizations of partial differential equations by finite difference methods. The results show that for small number of processors Multi-Color ILU(0) has the best performance, while for large number of processors Multi-Color Block SSOR performs the best.

• Journal of computational fluids engineering
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• v.3 no.1
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• pp.22-29
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• 1998

Parallel implementation is conducted for a SIMPLER finite volume model. The present parallelism is based on domain decomposition and explicit message passing using MPI and SHMEM. Two parallel solvers to tridiagonal matrix equation are employed. The implementation is verified on the Cray T3E system for a benchmark problem of natural convection in a sidewall-heated cavity. The test results illustrate good scalability of the present parallel models. Performance issues are elaborated in view of convergence as well as conventional parallel overheads and single processor performance. The effectiveness of a localized matrix solution algorithm is demonstrated.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.3
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• pp.11-23
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• 1995

In this paper, a parallel pipelined processor model which acts as a small VLIW processor architecture and a scheduling algorithm for extracting instruction-level parallelism on this architecture are proposed. The proposed model has a dual-instruction mode which has maximum 4 basic operations being executed in parallel. By combining these basic operations, variable instruction set can be designed for various applications. The scheduling algorithm schedules basic operations for parallel execution and removes pipeline hazards by examining data dependency and resource conflict relations. In order to examine operation and evaluate the performance,a C compiler and a simulator are developed. By simulating various test programs with the compiler and the simulator, the characteristics and the performance result of the proposed architecture are measured.

• Journal of Preventive Medicine and Public Health
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• v.21 no.2 s.24
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• pp.245-250
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• 1988

For the evaluation of change of FVC and $FEV_1$ after discontinuance of bronchodilator in the coal workers' pneumoconiosis patients, 17 pairs of patients were selected. They were matched by the age(${\pm}5$ y.o.) and the type of ventilatory impairment. Pulmonary function was measured 2 times bimonthly before and after the drug discontinuance discontinued after measurement of PFT for 2 times. In case group the bronchodilator was discontinued after measurement of PFT for 2 times. In control group there was no interruption of medication. FVC, $FEV_1$ decreased in both group as measurement progress. Simple linear regression coefficients against the month of measurement were calculated in both group and tested for parallelism between two groups. The results of test revealed that both regression coefficients were parallel. So in conclusively, discontinuance of medication of bronchodilator for coal workers pneumoconiosis patients has no effect on the decreasing rate of FVC, $FEV_1$.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.8 no.4
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• pp.41-47
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• 2009

This research deals with evaluation of machining accuracy for Parallel Kinematic Machine Tool(PKMT) applied parallel type robot system with high precision and stiffness. For this purpose, machine simulation is carried out to foreknow collision and interference between workpiece and tool. Furthermore, on the basis of machine simulation data, PKMT is manufactured. Machining accuracy such as cylindricity straightness, squareness, parallelism circularity, concentricity pitch error and yaw error, is measured by using coordinate measuring machine. Test piece for evaluation of machining accuracy is designed and manufactured under the standard of ISO 10791-7.

• Proceedings of the Computational Structural Engineering Institute Conference
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• 2000.10a
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• pp.124-132
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• 2000

Distributed processing approach for structural optimization is presented in this study. It is implemented on network of personal computers. The validity and efficiency of this approach are demonstrated and verified by test model of truss. Repeated structural analysis algorithm, which spend a lot of overall structural optimization processes, are based on substructuring scheme with domain-wise parallelism and converted to be adapted to hardware and software environments. The design information data are modularized and assigned to each computer in order to minize the communication cost. The communications between nodes are limited to static condensation and constraint-related data collection.

• Journal of the Korean Society of Industry Convergence
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• v.22 no.6
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• pp.627-635
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• 2019

In this study, we developed for processing complex features using CAM software that satisfies precision for example practice and related qualification tests suiTable for CNC training purposes. In addition, functions such as location control, speed control, and processing path generation, which are the main functions of CNC machining machines, were constructed using small equipment parts, servo motors, inverters, general purpose PCs, and commercial NC software and researched with the goal of developing low-cost education equipment. In the static accuracy inspection, the degree of machine when measuring the parallelism of the X, Y and Z axes and the vibration of the main shaft did not reach the allowable value. However, we have obtained a finished product that satisfies the CNC machine book sample shape machining, detailed functions of the position control function of the CNC machine tool, linear interpolation function, circular interpolation function, and tool offset function. In the qualification test shape processing, a shape with a degree of 1/100 mm was processed to obtain position accuracy that satisfied the tolerance.

• Journal of IKEEE
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• v.20 no.3
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• pp.303-306
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• 2016

In this paper, we propose a method to accelerate convolutional neural network by utilizing a GPGPU. Convolutional neural network is a sort of the neural network learning features of images. Convolutional neural network is suitable for the image processing required to learn a lot of data such as images. The convolutional layer of the conventional CNN required a large number of multiplications and it is difficult to operate in the real-time on the embedded environment. In this paper, we reduce the number of multiplications through Winograd convolution operation and perform parallel processing of the convolution by utilizing SIMT-based GPGPU. The experiment was conducted using ModelSim and TestDrive, and the experimental results showed that the processing time was improved by about 17%, compared to the conventional convolution.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.11
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• pp.2045-2049
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• 2008

In this paper, we propose an novel architecture for H.264 High Profile Encoder Intra Prediction module. This designed module can be operated in 306 cycle for one-macroblock. To verify the Encoder architecture, we developed the reference C from JM 13.2 and verified the our developed hardware using test vector generated by reference C. We adopt plan removal and SAD calculation to reduce the Hardware cost and cycle. The designed circuit can be operated in 133MHz clock system, and has 250K gate counts using TSMC 0.18 um process including SRAM memory.