• Title/Summary/Keyword: Parallel operation algorithm

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A Design of Power System Stabilization of TCSC System for Power system Oscillation Damping (전력 시스템의 동요 억제를 위한 TCSC용 안정화 장치 설계)

  • 정형환;허동렬;왕용필;박희철;이동철
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.16 no.2
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    • pp.104-112
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    • 2002
  • In this paper, it is suggested that the selection method of parameter of Power System Stabilizer(PSS) with robustness in low frequency oscillation for Thyristor Controlled Series Capacitor(TCSC) using Geletic Algorithm(GA). A TCSC meddle consists of a stories capacitor and a parallel path with a thyristor valve and a series inductor. Also in in parallel, as is typical with series capacitor applications, is a metal-oxide varistor(MOV) for overvoltage protection. The proposed PSS parameters are optimized using GA in order to maintain optimal operation of TCSC which is expected to be applied in transmission system to achieve a number of benefits under the various operating conditions. In order to verify the robustness of the proposed method, we considered the dynamic response of angular velocity deviation and terminal voltage deviation under a power fluctuation and rotor angle variation.

Development and Basic Experiment of Active Noise Control System for Reduction of Road Noise (도로 소음 저감을 위한 능동소음제어 시스템의 개발 및 기초실험)

  • Moon, Hak Ryong;Kang, Won Pyoung;Lim, You Jin
    • International Journal of Highway Engineering
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    • v.15 no.6
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    • pp.41-47
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    • 2013
  • PURPOSES : The purpose of this study is about noise which is generated from roads and is consist of irregular frequency variation from low frequency to various band. The existing methods of noise reduction are sound barrier that uses insulation material and absorbing material or have applied passive technology of noise reduction by devices. The total frequency band is needed to apply active noise control. METHODS : In this study applies to the field of road traffic environment, signal processing controller and various analog signal input/output, the amplifier module is based on parallel-core embedded processor designed. DSP performs the control algorithm of the road traffic noise. Noise sources in the open space performance of evaluation were applied. In this study, controller of active signal processor was designed based on the module of audio input/output and main controller of embedded process. The controller of active signal processor operates noise reduction algorithm and performance tests of noise reduction in inside and outside environment were executed. RESULTS : The signal processing controller with OMAP-L137 parallel-core processors as the center, DSP processors in the active control operations dealt with quickly. To maximize the operation speed of an object and ARM processor is external function keys and display for functions and evaluating the performance management system was designed for the purpose of the interface. Therefore the reduction of road traffic noise has established an electronic controller-based noise reduction. CONCLUSIONS : It is shown that noise reduction is effective in the case of pour tonal sound and complex tonal sound below 500Hz by appling to Fx-LMS.

A Study on the Design of FFT Processor for UWB Ultrafast Wireless Communication Systems (UWB 초고속 무선통신 시스템을 위한 FFT 프로세서 설계에 관한 연구)

  • Lee, Sang-Il;Chun, Young-Il
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.12
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    • pp.2140-2145
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    • 2008
  • We design and synthesize a 128-point FFT processor for multi-band OFDM, which can be applied to a UWB transceiver. The structure of a 128-point FFT processor is based on a Radix-2 FFT algorithm and a R2SDF pipeline architecture. The algorithm is efficiently modeled in VHDL and the result is simulated using Modelsim. Finally, they are synthesized on Xilinx Vertex-II FPGA, and an operational frequency of 18.7MHz has been obtained. It is expected that the proposed 128-point FFT processor can be applied to an entire FFT block as one of parallel processed FFTs. In order to obtain the enhanced maximum frequency of operation, we design the FFT module consisting of four 128-point FFT processors for parallel process. As a result, we achieve the performance requirement of computing the FFT module in multi-band OFDM symbol timing in 90nm ASIC process.

The Signal Acquisition Algorithm for Ultra Wide-band Communication Systems (UWB 통신시스템에서 동기 획득 알고리즘)

  • Park, Dae-Heon;Kang, Beom-Jin;Park, Jang-Woo;Cho, Sung-Eon
    • Journal of Advanced Navigation Technology
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    • v.12 no.2
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    • pp.146-153
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    • 2008
  • Due to the extremely short pulse in the Ultra-Wideband (UWB) technology, the accurate synchronization acquisition method is very important for both high data-rate WPAN and low data-rate WPAN. In this paper, we propose the synchronization acquisition algorithm based on two-step signal search method to acquire the synchronization in the UWB multi-path channel. At the first step, the search window is divided by two and the window that has higher power is chosen as a next search window. This operation is repeated until the measure power of the search window is smaller than the threshold value. At the second step, we employ Linear Search algorithm to the search window obtained at the first step for fine search. The proposed algorithm is proved that the synchronization acquisition is faster than the parallel search algorithm and it shows good performance in environment of the SNR extreme changes by the simulation.

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Determination of Cutting Direction for Tool Path Minimization in Zigzag Milling Operation (Zigzag 밀링가공에서 공구경로 최소화를 위한 가공방향 결정방법)

  • Kim, Byoung-Keuk;Park, Joon-Young
    • Journal of Korean Institute of Industrial Engineers
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    • v.27 no.1
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    • pp.69-88
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    • 2001
  • In the zigzag milling operation, an important issue is to design a machining strategy which minimizes the cutting time. An important variable for minimization of cutting time is the tool path length. The tool path is divided into cutting path and non-cutting path. Cutting path can be subdivided into tool path segment and step-over, and non-cutting path can be regarded as the tool retraction. We propose a new method to determine the cutting direction which minimizes the length of tool path in a convex or concave polygonal shape including islands. For the minimization of tool path length, we consider two factors such as step-over and tool retraction. Step-over is defined as the tool path length which is parallel to the boundary edges for machining area and the tool retraction is a non-cutting path for machining any remaining regions. In the determination of cutting direction, we propose a mathematical model and an algorithm which minimizes tool retraction length in complex shapes. With the proposed methods, we can generate a tool path for the minimization of cutting time in a convex or concave polygonal shapes including islands.

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Output Control of ITER Vertical Stabilization Converter with Circulating Current Technique (순환전류를 이용한 ITER Vertical Stabilization 컨버터의 출력 제어)

  • Chung, Gyo-Bum;Ji, Jun-Keun;Mok, Hyung-Soo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.5
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    • pp.379-386
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    • 2009
  • This paper investigates the operation of ITER(International Thermonuclear Experimental Reactor) Vertical Stabilization(VS) converter with circulating current. The VS converter has two subunits in parallel. The subunit is composed two back-to-back 12 pulse thyristor converter in series. The circulating current free technique can not always maintain the closed path for the load current because of a dead time zone of the converter operation at the region of the load current inversion. The complex circulation current technique for the load current inversion with VS converter can achieve the fast response and always maintain the closed path for the load curret. The paper proposes the new circulating current algorithm for the load current inversion of ITER VS converter and proves the performance of the circulating current technique with PSIM simulation study.

The design of adaptive Controller for the Voltage Bus Conditioner for the improvement of the Power Quality in the DC Power Distribution System (DC 배전시스템의 품질향상을 위한 VBC 적응제어)

  • Woo, Hyun-Min;Lee, Byung-Hun;Chang, Han-Sol;La, Jae-Du;Kim, Young-Seok
    • Proceedings of the KSR Conference
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    • 2011.10a
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    • pp.2348-2356
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    • 2011
  • In recent years, many researches for DC power distributed system (PDS) are being preformed and the importance of the DC PDS is more and more emphasized. Furthermore, in the railway system, the DC PDS is used in subway station lighting, facilities, etc. In the DC PDS, DC bus voltage instability may be occurred by the operation of multiple parallel loads such as pulsed power load, motor drive system, and constant power loads. Thus, good quality and high reliability for electric power are required and voltage bus conditioner (VBC) may be used the DC PDS. The VBC is a DC/DC converter for mitigation of the bus transients. In this paper, adaptive controller is designed. The simulation results by PSIM are presented for validating the proposed control algorithm.

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A Study on N-Channel Data Correlators for Multirate in IMT-2000 (IMT-2000에서 Multirate를 위한 N-채널 데이터 상관기에 관한 연구)

  • 김종엽;이선근;김환용
    • Proceedings of the IEEK Conference
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    • 2000.06a
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    • pp.49-52
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    • 2000
  • The Multi-Code CDMA systems that are proposed as an effective transmission methodology in the IMT-2000 systems allow higher rate services under the IS-95 CDMA infrastructure. The Multi-Code CDMA systems convert the higher rate data into the lower rate by serial to parallel operation and spread the converted data streams by the multiple walsh codes, and its mobile receiver needs multiple walsh generators and data correlators to demodulate simultaneously multiple walsh code channels. Therefore, the number of data correlators is increased as the number of traffic channels increases. In this paper, we proposed the new structure of the data correlators using walsh overlay coding, the shared accumulator, and FWHT(Fast Walsh Hadamard Transform) algorithm for reducing the bottle-neck effect resulting the increase of the number of data correlators.

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Control Algorithm for Circulating Currents in Parallel Operation of Three-Phase AC/DC Converter for DC Distribution System (DC 배전용 3상 AC/DC 컨버터의 병렬 운전시 발생하는 순환전류 제어 알고리즘)

  • Jung, Chul-Ho;Shin, Soo-Cheol;Jung, Tae-Bok;Lee, Taeck-Kie;Won, Chung-Yuen
    • Proceedings of the KIPE Conference
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    • 2011.11a
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    • pp.167-168
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    • 2011
  • 본 논문에서는 여러 대의 전력변환장치를 모듈화 하여 병렬 운전할시 필연적으로 발생하게 되는 순환전류를 억제하기 위한 제어 기법을 제안하였다. 이에 따라 병렬 운전 시스템이 갖는 응답 특성 및 정상상태 동작 등의 타당성을 시뮬레이션 모델을 통하여 검토하였다.

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A Study on Stable Indication for a Sloshing of Fuel-quantity according to Driving State of Vehicle (차량 주행 상태에 따른 연료량 유동의 안정 지침에 대한 연구)

  • Hur, Jin;Park, Jong-Myeong;Lee, Seon-Bong
    • Transactions of the Korean Society of Automotive Engineers
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    • v.20 no.3
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    • pp.37-44
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    • 2012
  • In this paper, the application of robust fuel gauge algorithm in the external environment to general fuel gauge system is proposed. The proposed fuel gauge system is composed of two modules which are Moving Average Filter (MAF) and Inclination Filter (IF). They are used to show correctly the amount of fuel in the external environment which are curve road, slope or acceleration/deceleration driving. In parallel, verification and validation processes using Software In the Loop Simulation (SILS) in personal computer and Hardware In the Loop Simulation (HILS) similar to actual vehicle environments are established. Through this research, it turned out to be possible to operation of gauge become correct of external environment.