• 제목/요약/키워드: Parallel circuit

검색결과 919건 처리시간 0.028초

다수의 장애물을 가진 유동채널에서의 강제 대류에 관한 연구 (Forced Convection in a Flow Channel with Multiple Obstacles)

  • 남평우;조성환
    • 태양에너지
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    • 제9권1호
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    • pp.62-69
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    • 1989
  • This analysis is to investigate the influence of inflow angle when cooling air flows into PC (Printed Circuit) board channels. Flow between PC board channels with heat generating blocks is assumed laminar, incompressible, two-dimensional. Geometric parameters (block spacing (S), block height (H), block width (W) and channel height (L)) are held fixed. Inflow angle variations are $-10^{\circ},\;0^{\circ},\;10^{\circ}$, where uniform heat flux per unit axial length Q (W/m) from heated block surfaces is generated. The governing equations for velocity and temperature are solved by SIMPLE (Semi-Implicit Method Pressure for Linked Equation) algorithm. Nusselt number on each block surfaces is analyzed after a numerical calculation result. The result shows that the assumption on parallel inflow (inflow angle to channel, $0^{\circ}$) to PC board channels can be used without large error even when inflow' angle is varied.

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3.8 ㎸급 7직렬 저항형 고온초전도한류기의 제작 및 시험 (Fabrication and Test of the 3.8 ㎸ Resistive SFCL Based on YBCO Films)

  • 심정욱;김혜림;현옥배;박권배;이방욱;강종성;오일성
    • Progress in Superconductivity
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    • 제5권2호
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    • pp.136-140
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    • 2004
  • We fabricated and tested a resistive superconducting fault current limiters (SFCL) operated at 3.8 ㎸ based on YBCO thin films. The SFCL was composed of 7 components connected in series. Each component was designed to be capable of current limiting at 600 V, and has a SiC shunt resistor ( $R_{s}$) of 40 Ω in Parallel. Short circuit tests were carried out fur 0 and 90 degree faults lasting fur 5 cycles. The test results showed that the 7 components were quenched simultaneously under the safe quenches and evenly shared the applied voltage. The SFCL successfully suppressed the fault currents below 94 $A_{peak}$ within the quarter cycle after fault.t.t.

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구형 마이크로스트립 안테나의 개선된 복사 어드미턴스 계산방법 (Improved Method for Calculating Radiation Admittance of a Rectangular Microstrip Patch Antenna)

  • 홍재표;조영기;손현
    • 대한전자공학회논문지
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    • 제26권2호
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    • pp.35-40
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    • 1989
  • 본 논문에서는 균일한 유전체로 채워져 있고 윗면에 슬릿이 있는 평행평판 도파로의 ${\pi}-$ 등가회로로 부터 구형 마이크로스트립 안테나의 복사 컨덕턴스와 서셉턴스를 동시에 구하는 새로운 방법을 제시하였다. 계산된 결과를 기존의 이론치와 비교하였다. 또한 등가전송선로를 이용하여 반사손실(return loss) 및 공진주파수를 계산하여 실험치와 비교한 결과 양호한 특성을 얻었다.

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바이어스 동작점을 이용한 쇼트키 다이오드 선형화기 설계 (Design of the Shottky Diode Linearizer using a Bias Point)

  • 도대주;이원희;허정;이종악
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2001년도 하계종합학술대회 논문집(1)
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    • pp.393-396
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    • 2001
  • In this paper, a new type of linearizer using a parallel diode with a bias feed resistance has been studied. It has positive gain and negative phase deviations because of a nonlinearity of the diode and movement of bias point cause by a voltage drop at the bias feed resistance. This predistortion linearizer consists of the little component and miniaturizes circuit design. The characteristics of this linearizer can be easily tuned using input bias voltage. In fabricated linearizer, maximum gain and Phase deviation of the linearizer is 1dB, 21$^{\circ}$ respectively. By applying its characteristics to the power amplifier, it will be linearized power amplifier.

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Diode를 이용한 박막형 한류기의 열발생 저감방안 (Generated heat decrease of thin film superconducting fault current limiter using diodes)

  • 최효상;현옥배;김혜림;황시돌
    • 한국초전도ㆍ저온공학회논문지
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    • 제2권2호
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    • pp.11-14
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    • 2000
  • We fabricated a resistive superconducting fault current limiter (SFCL) of meander type based on a YBCO film. In order to disperse the heat generated at hot spots in the YBCO film the film was coated with a gold shunt layer. When diodes were inserted in the parallel circuit to restrict the temperature increase in the SFCL element by reducing power supply cycles, the voltage could be increased to $\sqrt{2}$ times with the same quench resistance at a half and full cycles.

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CAD에 의한 900MHz대 일체형 유전체 Band Pass Filter 설계 (Design for 900MHz Band Monoblock Dielectric Filter by Using CAD)

  • 강종윤;최지원;윤석진;김현재;정형진;박창엽
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 추계학술대회 논문집 학회본부
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    • pp.653-655
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    • 1997
  • In this paper, a monoblock dielectric filter for 900MHz band CT-1 is designed by using CAD(Computer Aided Design). Equivalent circuit for monoblock dielectric filter represented by parallel coupled stripline is simulated by using SuperCompact software tool. A Designed filter structure is simulated by using HFSS to optimize result.

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고속전철용 단상 PWM 컨버터에 관한 연구 (A Single Phase PWM Converter for High Speed Traction System)

  • 김연준;김두식;이현원;서광덕;김남해
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 추계학술대회 논문집 학회본부
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    • pp.630-633
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    • 1997
  • This paper describes a design of a single phase PWM converter for high speed train. Parallel operation and control method of four Quadrant PWM converters are described. Simulation and modelling of the converters is performed. Capacity of the converter/inverter and power circuit for high speed traction system designed. And harmonic contents of AC line current's are analyzed. The results of the simulation are presented.

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부스트 Negative Bias를 가지는 단상 SRM 컨버터 (Single Phase SRM Converter with Boost Negative Bias)

  • ;석승훈;이동희;안진우
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2008년도 제39회 하계학술대회
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    • pp.879-880
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    • 2008
  • At the high speed operation, the boost negative bias can reduce the negative torque and increase the dwell angle, so the output power and efficiency can be improved. In this paper, a novel power converter for single phase SRM with boost negative bias is proposed. A simple passive capacitor circuit is added in the front-end, which consists of three diodes and one capacitor. Based on this passive capacitor network, the two capacitors can be connected in series and parallel in different condition. In proposed converter, the phase winding of SRM obtains general dc-link voltage in excitation mode and the double dc-link voltage in demagnetization mode. The operation modes of the proposed converter are analyzed in detail. Some computer simulation and experimental results are done to verify the performance of proposed converter.

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전기적인 특성을 고려한 태양전지모듈의 노화 분석 (Degradation Analysis of PV Module Considering Electrical Characteristics)

  • 김승태;강기환;박지홍;안형근;유권종;한득영
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2008년도 제39회 하계학술대회
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    • pp.1110-1111
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    • 2008
  • The life time of PV module is semi-permanent. But, because of installation and module fabrication process, its important part can not be finished. In this paper, we analyze 15 years old modules made from different company. Among the PV modules, the maximum power drop ratio was 12.23% minimum and 80.63% maximum. Also the effect of solar cell's short circuit current difference was analyzed. The PV module exposed about 65days, its the maximum power drop ratio was 1.29% minimum and 23.43% maximum. It is for reduction of current value. And the reason for current reduction was due to reduction of parallel resistance of solar cell. To prevent early degradation, it is need to have attention to fabrication, installation and maintenance.

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A NEW CONTROL METHOD FOR CURRENT SHARING IN THE 12-PULSE PHASE-CONTROLLED RECTIFIER

  • Min, Byoung-Gwon;Baek, Byung-San;Won, Chung-Yuen
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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    • pp.581-585
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    • 1998
  • This paper presents the new current sharing control method of a 12-pulse phase-controlled rectifier(PCR) for a UPS. The control circuit of the 12-Pulse PCR with a parallel operating rectifier system is proposed to balance input currents and to reduce the harmonics of input current. The PCR is used widely in the industrial world, since its cost is much lower than that of the PWM converter and the composition of control circuits is simple. This system is developed and tested for a 3-phase 400KVA UPS system and the experimental results in this application are included.

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