• Title/Summary/Keyword: Parallel Power Amplifier

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Simulation and Experimental Validation of Gain-Control Parallel Hybrid Fiber Amplifier

  • Ali, Mudhafar Hussein;Abdullah, Fairuz;Jamaludin, Md. Zaini;Al-Mansoori, Mohammed Hayder;Al-Mashhadani, Thamer Fahad;Abass, Abdulla Khudiar
    • Journal of the Optical Society of Korea
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    • v.18 no.6
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    • pp.657-662
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    • 2014
  • We demonstrate a simulation of a parallel hybrid fiber amplifier in the C+L-band with a gain controlling technique. A variable optical coupler is used to control the input signal power for both EDFA and RFA branches. The gain spectra of the C+L-band are flattened by optimizing the coupling ratio of the input signal power. In order to enhance the pump conversion efficiency, the EDFA branch was pumped by the residual Raman pump power. A gain bandwidth of 60 nm from 1530 nm to 1590 nm is obtained with large input signal power less than -5 dBm. The gain variation is about 1.06 dB at a small input signal power of -30 dBm, and it is reduced to 0.77 dB at the large input signal power of -5 dBm. The experimental results show close agreement with the simulation results.

Design of a CMOS Programmable Slew Rate Operational Amplifier with a Switched Parallel Current Subtraction Circuit (병렬전류감산기를 이용한 슬루율 가변 연산증폭기 설계)

  • 신종민;윤광섭
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.5
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    • pp.730-736
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    • 1995
  • This paper presents the design of a CMOS programmable slew rate operational amplifier based upon a newly proposed concept, that is a switched parallel current subtraction circuit with adaptive biasing technique. By utilizing the newly designed circuit, it was proven that slew rate was linearly controlled and power dissipation was optimized. If the programmable slew rate amplifier is employed into mixed signal system, it can furnish the convenience of timing control and optimized power dissipation. Simulated data showed the slew rate ranging from 5. 83V/$\mu$s to 41.4V/$\mu$s, power dissipation ranging from 1.13mW to 4.1mW, and the other circuit performance parameters were proven to be comparable with those of a conventional operational amplifier.

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High Efficiency Frequency Tunable Inverse Class-E Amplifier (고효율 주파수 가변 역 E-급 증폭기)

  • Kim, Young
    • Journal of Advanced Navigation Technology
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    • v.14 no.2
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    • pp.176-182
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    • 2010
  • This paper proposes that an inverse class-E amplifier is used a tunable parallel resonator at output port in order to maintain a high power-added efficiency(PAE) and output power with wide frequency ranges. A tunable circuit has a constant Q factor at operating frequency ranges and because of using varactor diode, the inductor and capacitor values of resonator can be changed. Also, the inductance value for zero-current switching (ZCS) is implemented a lumped element and the capacitance value is made a distributed element for phase compensation. The inverse class E amplifier using tunable parallel resonator is obtained to deliver 25dBm output power and achieve maximum power added efficiency(PAE) of 75% at 65-120MHz frequency ranges.

Design and Implementation of Class-AB High Power Amplifier for IMT-2000 System using Optimized Defected Ground Structure (최적화된 DGS 회로를 이용한 IMT-2000용 Class-AB 대전력증폭기의 설계 및 구현)

  • 강병권;차용성;김선형;박준석
    • Journal of the Institute of Convergence Signal Processing
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    • v.4 no.1
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    • pp.41-48
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    • 2003
  • In this paper, a new equivalent circuit for a defected ground structure(DGS) is proposed and adapted to design of a power amplifier for performance improvement. The DGS equivalent circuit presented in this paper consists of parallel LC resonator and parallel capacitance to describe the fringing fields due to the etched defects on the metallic ground plane, and also is used to optimize the matching circuit of a power amplifier. A previous research has also used a DGS for harmonic rejection and efficiency improvement of a power amplifier(1), however, there was no exact equivalent circuit analysis. In this paper, we suggest a novel design method and show the performance improvement of a class AB power amplifier by using the equivalent circuit of a DGS applied to output matching circuit. The design method presented in this paper can provide very accurate design results to satisfy the optimum load condition and the desirable harmonic rejection, simultaneously. As a design example, we have designed a 20W power amplifier with and without circuit simulation of DGS, and compared the measurement results.

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Design of 5 W Current-Mode Class D RF Power Amplifier for GSM Band (GSM대역 5 W급 전류 모드 D급 전력증폭기의 설계)

  • 서용주;조경준;김종헌
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.6
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    • pp.540-547
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    • 2004
  • In this paper, a current - mode class D(CMCD) power amplifier over 70 % power added efficiency at 900 ㎒ is designed and implemented. Based on push-pull class B structure, main power loss due to charge and discharge of output capacitance in switching mode power amplifier is minimized by applying a parallel harmonic control circuit. Experimental CMCD amplifier with 73 % power added efficiency at 3.2 W and 72 % power added efficiency at 5 W are achieved respectively. In addition a characteristic of switching mode power amplifier whose output power is proportional to magnitude of U power is verified.

High performance V-Band Downconverter Module (V-band MMIC Downconverter 개발에 관한 연구)

  • 김동기;이상효;김정현;김성호;정진호;전문석;권영우;백창욱;김년태
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.5C
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    • pp.522-529
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    • 2002
  • MMIC circuits in whole receiver system was fabricated based on GaAs pHEMT technology. And a V-band downconverter module was fabricated by integrating these circuits. The downconverter module consists of a LO drive power amplifier which generates 24dBm output power, a low noise amplifier(LNA) which shows 20 dB small signal gain, an active parallel feedback oscillator which generates 1.6 dBm output power, and a cascode mixer which shows over 6dB conversion gain. The good conversion gain performance of our mixer made no need to attach any IF amplifier which grows conversion gain. Measured results of the complete downconverter show a conversion gain of over 20 dB between 57.5 GHz and 61.7GHz without IF amplifier.

A implementation of predistorter using the Series Diode Linearizer for RF Amplifiers (RF전력증폭기에 직렬다이오드선형화기를 이용한 전치보상기 구현)

  • Won, Yong-Kyu;Yun, Man-Soo;Lee, Sang-Cheol;Chung, Chan-Soo
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.52 no.1
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    • pp.28-34
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    • 2003
  • In this paper, a predistortion linearizer using series diode is proposed for linearizing the power amplifier in microwave radio systems. The power amplifier should be operated near saturation region to achieve high efficiency. But at this region, amplitude and phase distortions of the amplifier remarkably increase with the increase of input power and cause a significant adjacent channel interference. The linearizer is composed of a series diode with a parallel capacitor, which provides positive amplitude and negative phase deviations with the increasing input power. This type of linearizer using the nonlinearity of diode has improved the C/I(Carrier to Intermodulation Distortion) ratio well. By applying this linearizer to two-tone 880MHz power amplifier, adjacent channel leakage power is improved up to 5dBm.

On-chip Smart Functions for Efficiency Enhancement of MMIC Power Amplifiers for W-CDMA Handset Applications

  • Youn S. Noh;Kim, Ji H.;Kim, Joon H.;Kim, Song G.;Park, Chul S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.1
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    • pp.47-54
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    • 2003
  • New efficiency enhancement techniques have been devised and implemented to InGaP/GaAs HBT MMIC power amplifiers for W-CDMA mobile terminals applications. Two different types of bias current control circuits that select the efficient quiescent currents in accordance with the required output power levels are proposed for overall power efficiency improvement. A dual chain power amplifier with single matching network composed of two different parallel-connected power amplifier is also introduced. With these efficiency enhancement techniques, the implemented MMIC power amplifiers presents power added efficiency (PAE) more than 14.8 % and adjacent channel leakage ratio(ACLR) lower than -39 dBc at 20 dBm output power and PAE more than 39.4% and ACLR lower than -33 dBc at 28 dBm output power. The average power usage efficiency of the power amplifier is improved by a factor of more than 1.415 with the bias current control circuits and even up to a factor of 3 with the dual chain power amplifier.

The RF Power Amplifier Using Active Biasing Circuit for Suppression Drain Current under Variation Temperature (RF전력 증폭기의 온도 변화에 따른 Drain 전류변동 억제를 위한 능동 바이어스 회로의 구현 및 특성 측정)

  • Cho, Hee-Jea;Jeon, Joong-Sung;Sim, Jun-Hwan;Kang, In-Ho;Ye, Byeong-Duck;Hong, Tchang-Hee
    • Journal of Navigation and Port Research
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    • v.27 no.1
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    • pp.81-86
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    • 2003
  • In the paper, the power amplifier using active biasing for LDMOS MRF-21060 is designed and fabricated. Driving amplifier using AH1 and parallel power amplifier AH11 is made to drive the LDMOS MRF 21060 power amplifier. The variation of current consumption in the fabricated 5 Watt power amplifier has an excellent characteristics of less than 0.1A, whereas passive biasing circuit dissipate more than 0.5A. The implemented power amplifier has the gain over 12 dB, the gain flatness of less than $\pm$0.09dB and input and output return loss of less than -19dB over the frequency range 2.11~2.17GHz. The DC operation point of this power amplifier at temperature variation from $0^{\circ}C$ to $60^{\circ}C$ is fixed by active circuit.

A Resonance Power Combining Technique Using CRLH-Transmission Line (CRLH 전송 선로를 이용한 공진 기법의 전력 결합 기술)

  • Kim, Ell-Kou;Kim, Young;Kwon, Sang-Keun;Yoon, Young-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.8
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    • pp.673-679
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    • 2009
  • This paper proposes a resonance power-combining technique using CRLH-transmission line. The circuits using proposed technique consist of the parallel capacitances and transmission lines to satisfy matching conditions and to combine power of amplifiers. The CRLH(Composite Right/Lefi-Handed) transmission lines are used to reduce the circuit size. As a result, the power combining amplifier using proposed techniques is measured that a gain is equal and the output power is increased about 2.2 dB higher than the single amplifier. Also, a size of amplifier is 78.3 % smaller than the conventional amplifier using RH transmission line.