• Current Photovoltaic Research
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• v.7 no.4
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• pp.121-124
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• 2019

In this research, the concept of a salt farm parallel solar power system, which produce salt and electricity at the same site, is proposed for the first time in the world. The concept is that large waterproof plates made by interconnected solar modules are installed at the bottom of the salt farm. The pilot system was successfully installed at a sea shore, and verified its feasibility as a solar power plant. For deeper understanding, simulations for power prediction of the system were carried out and compared with the field test results. The power generation of the salt farm parallel system is comparable to conventional solar power plants. The cooling effect by sea water contributes more to the increase in the crystalline silicon photovoltaic module performance than the absorption loss due to sea water by maintaining certain height above the module.

• Journal of Ocean Engineering and Technology
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• v.31 no.6
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• pp.405-412
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• 2017

Because of the rapid development of computer technology in recent years, wave models can utilize parallel calculations for the high-resolution prediction of open sea and coastal areas with high accuracy. Parallel calculations also allow national agencies in the relevant sectors to produce marine forecasting data through massive parallel calculations. Meanwhile, the eastern coast of the Korean Peninsula has been increasingly damaged by swell-like high waves, and many researchers and scientists are continuing their efforts to anticipate and reduce the damage. In general, the short-term transformation of swell-like high waves can be reproduced relatively well in the third generation wave models, but the transformation of relatively long period waves needs to be simulated with higher accuracy in terms of the nonlinear wave interactions to gain a better understanding of the low-frequency wave generation and development mechanisms. In this study, we developed a calculation module to improve the calculation of the nonlinear energy transfer in the 3rd generation wave model and integrated it into the wave model to effectively consider the nonlinear wave interaction. First, the nonlinear energy transfer calculation module and third generation model were combined. Then, the combined model was used to reproduce the wave transformation due to the nonlinear interaction, and the performance of the developed operation module was verified.

• Journal of Korea Society of Industrial Information Systems
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• v.14 no.4
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• pp.16-29
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• 2009

This paper investigates the kinematic and dynamic analysis of a spherical three degree of freedom parallel joint module, which is used in the exercise equipment for balance and leg-strength improvement of aged people. The joint module has three dyads which consist of two links and three revolute joints, and their all joints intersect at the global point located at the module's center. The paper shows the explicit mathematical procedure for deriving the closed form solutions in the inverse and forward position analysis of this parallel joint module. In velocity and acceleration analysis, we derived relations for joint velocities and accelerations of dyads and rotational velocity and acceleration of the top plate. For applying this module to rehabilitation exercise, we determined the dynamic model of the Korean males in their 50s and examined the model's results by dynamic model simulation.

• Transactions of the Korean Society of Mechanical Engineers
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• v.18 no.11
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• pp.2846-2859
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• 1994

This work deals with kinematic analysis of fault-tolerant 3 degree-of-freedom spherical modules which have force redundancies in its parallel structure. The performance of a redundantly actuated four-legged module with no actuator failure, a single actuator failure, partial and half failure of dual actuator are compared to that of a three-legged module, in terms of maximum force transmission ratio, isotropic characteristics, and fault-tolerant capability. Additionally, a system with an excess number of small floating actuators is considered, and the contribution of these small actuators to the force transmission and fault-tolerant capability is evaluated. This study illustrates that the redundant actuation mode allows significant saving of input actuation effort, and also delivers a fault tolerance.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.10
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• pp.1-12
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• 1993

A multiprocessor system for high-speed processing of hybrid image coding algorithms such as H.261, MPEG, or Digital HDTV is presented in this study. Using a combination of highly parallel 32-bit microprocessor, DCT(Discrete Cosine Transform), and motion detection processor, a new processing module is designed for the implementation of high performance coding system. The sysyem is implemented to allow parallel processing since a single module alone cannot perform hybrid coding algorithms at high speed, and crossbar switch is used to realize various parallel processing architectures by altering interconnections between processing modules within the system.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.864-867
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• 2005

In this paper we introduce a design of parallel architecture for wavelet transformation on FPGA. We implement wavelet transforms though lifting scheme and apply Daubechies4 transform equations. This technique has an advantage that we can obtain perfect reconstruction of the data. We divide our process to high pass filter and low pass filter. With this division, we can find coefficients from low and high pass filters simultaneously using parallel processing properties of FPGA to reduce processing time. From the equations, we have to design real number computation module, referred to IEEE754 standard. We choose 32 bit computation that is fine enough to reconstruct data. After that we arrange the real number module according to Daubechies4 transform though lifting scheme.

• Progress in Superconductivity and Cryogenics
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• v.14 no.3
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• pp.13-17
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• 2012

KEPCO Research Institute has been researching a Superconducting Fault Current Limiter (SFCL) which is considered one of solutions of fault current problems with Korea Institute of Machinery & Materials (KIMM) and Hanyang University since 2011. In this paper, we fabricated a current limiting module and conducted electrical short circuit tests for checking the validity of the transmission level SFCL design. Based on the short circuit characteristics of the second generation High Temperature Superconductor (HTS), we analyzed the short circuit characteristics of 3 parallel connected superconducting wires. The structure of the HTS wire is as follows: the stainless steel stabilizer of $100{\mu}m$ is laminated on the superconductor layer and under the substrate, both of which are electrically jointed with solder. We fabricated the current limiting module which has 40 series and 6 parallel connections and studied the short circuit characteristics of the module under various voltage levels.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.11
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• pp.130-138
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• 2016

In this paper present the real-time system parallel testing techniques for weapon systems error verification. Previously field testing equipment in the military field was using the sequential testing method to maintain. This method could not check the error verification of interference. For this reason, in this paper propose the real-time system parallel testing techniques using an embedded module instead of the sequential testing techniques which is used in the weapon system error verification. Using the embedded module mounted switching control card conduct the parallel testing and then send the result to the PC. This method is possible to increase the reliability in the weapon system error verification.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.1
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• pp.39-49
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• 2011

Turbo code needs long decoding time because of iterative decoding. To communicate with high speed, we have to shorten decoding time and it is possible with parallel process. But memory contention can cause from parallel process, and it reduces performance of decoder. To avoid memory contention, QPP interleaver is proposed in 2006. In this paper, we propose MDF method which is fit to QPP interleaver, and has relatively short decoding time and reduced logic. And introduce the design of MAP decode module using MDF method. Designed decoder is targetted to FPGA of Xilinx, and its throughput is 80Mbps maximum.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.12
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• pp.1058-1062
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• 2000

We investigated resistive superconducting fault current limites (SFCLs) fabricated using YBCO thin films on 2-inch diameter sapphire substrates. Nearly identical SFCL units were prepared and tested. The units were connected in series and parallel to increase the current and voltage ratings. A serial connection of the units showed significantly unbalanced power dissipation between the units. This imbalance was removed by introducing a shunt resistor to the firstly quenched unit. Parallel connection of the units increased the current rating. An SFCL module of 4 units in parallel, each of which has minimum quench current rating. An SFCL module of 4 units in parallel, each of which has minimum quench current 25 A$\_$peak/, was produced and successfully tested at a 220 V$\_$rms/circuit. From the resistance increase, we estimated that the film temperature increased to 200 K in 5 msec, and 300 K in 120 msec. Successive quenches revealed that this system is stable without degradation in the current limiting capability under such thermal shocks as quenches at 220 V$\_$rms/.