• 제목/요약/키워드: Parallel Integration

검색결과 159건 처리시간 0.031초

Integrated Thyristor Switch Structures for Capacitor Discharge Application

  • 김은동;장창리;김상철;백도현
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 춘계학술대회 논문집 반도체재료
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    • pp.22-25
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    • 2001
  • A thyristor switch circuit for capacitor discharge application, of which the equivalent circuit includes a resistor between cathode and gate of a reverse-conducting thyristor and an avalanche diode anti-parallel between its anode and gate to set thyristor tum-on voltage, is monolithically integrated by planar process with AVE double-implantation method. To ensure a lower breakdown voltage of the avalanche diode for thyristor tum-on than the break-over voltage of the thyristor, $p^+$ wells on thyristor p base layer are made by boron implantation/drive-in for a steeper doping profile with higher concentrations while rest p layers of thyristor and free-wheeling diode parts are formed with Al implantation/drive-in for a doping profile of lower steepness. The free-wheeling diode part is isolated from the thyristor part by formation of separated p-well emitter for suppressing commutation between them, which is achieved during the formation of thyristor p-base layer.

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Challenges for Nanoscale MOSFETs and Emerging Nanoelectronics

  • Kim, Yong-Bin
    • Transactions on Electrical and Electronic Materials
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    • 제11권3호
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    • pp.93-105
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    • 2010
  • Complementary metal-oxide-semiconductor (CMOS) technology scaling has been a main key for continuous progress in silicon-based semiconductor industry over the past three decades. However, as the technology scaling enters nanometer regime, CMOS devices are facing many serious problems such as increased leakage currents, difficulty on increase of on-current, large parameter variations, low reliability and yield, increase in manufacturing cost, and etc. To sustain the historical improvements, various innovations in CMOS materials and device structures have been researched and introduced. In parallel with those researches, various new nanoelectronic devices, so called "Beyond CMOS Devices," are actively being investigated and researched to supplement or possibly replace ultimately scaled conventional CMOS devices. While those nanoelectronic devices offer ultra-high density system integration, they are still in a premature stage having many critical issues such as high variations and deteriorated reliability. The practical realization of those promising technologies requires extensive researches from device to system architecture level. In this paper, the current researches and challenges on nanoelectronics are reviewed and critical tasks are summarized from device level to circuit design/CAD domain to better prepare for the forthcoming technologies.

상태 기반 비즈니스 프로세스 트랜젝션 관리 (State-driven Business Process Transaction Management)

  • 이순재;윤장혁;김광수
    • 한국경영과학회:학술대회논문집
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    • 한국경영과학회/대한산업공학회 2003년도 춘계공동학술대회
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    • pp.772-779
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    • 2003
  • In the real world, business processes are very complex and composed or heterogeneous business activities. As the advent or the Web services enables business processes to be Integrated and to be automated. It makes enterprises integrate heterogeneous business processes from different business partners as well as their internal business processes. To support recent trends in integration of business processes, BPEL, WS-E and WS-T specipications have been established since 2002 WS-C and WS-T describe the reliable business environment including compensation (undo) or completed business processes. The compensation of business processes is a basic requirement for automation or business processes among business partners. Systems implementing these specifications, however, very rarely exist. It's not only because those specifications are developed recently. but also because they are not perfect yet. In this paper, a new business process transaction management, which complements the deficiency of WS-E and WS-T, is suggested. Furthermore, the new approach proposes the business logics for supervisory coordinators which manage serial and parallel business gates The modification or traditional WS-T specification and the simplification or WS-E specification make business processes managed effectively.

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Application of Multi-Frontal Method in Collaborative Engineering Environment

  • Cho, Seong-Wook;Choi, Young;Lee, Gyu-Bong;Kwon, Ki-Eak
    • International Journal of CAD/CAM
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    • 제3권1_2호
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    • pp.51-60
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    • 2003
  • The growth of the World Wide Web and the advances in high-speed network access have greatly changed existing CAD/CAE environment. The WWW has enabled us to share various distributed product data and to collaborate in the design process. An international standard for the product model data, STEP, and a standard for the distributed object technology, CORBA, are very important technological components for the interoperability in the advanced design and manufacturing environment. These two technologies provide background for the sharing of product data and the integration of applications on the network. This paper describes a distributed CAD/CAE environment that is integrated on the network by CORBA and product model data standard STEP. Several prototype application modules were implemented to verify the proposed concept and the test result is discussed. Finite element analysis server are further distributed into several frontal servers for the implementation of distributed parallel solution of finite element system equations. Distributed computation of analysis server is also implemented by using CORBA for the generalization of the proposed method.

A High Performance Solenoid-Type MEMS Inductor

  • Seonho Seok;Chul Nam;Park, Wonseo;Kukjin Chun
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제1권3호
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    • pp.182-188
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    • 2001
  • A solenoid-type MEMS inductor with a quality factor over 10 at 2 GHz has been developed using an electroplating technique. The integrated spiral inductor has a low Q factor due to substrate loss and skin effects. It also occupies a large area compared to the solenoid-type inductor. The direction of flux of the solenoid-type inductor is parallel to the substrate, which can lower the substrate loss and other interference with integrated passive components. To estimate the characteristics of the proposed inductor over a high frequency range, the 3D FEM (Finite Element Method) simulation is used by using the HFSS at the Ansoft corporation. The electroplated solenoid-type inductor is fabricated on a glass substrate step by step by using photolithography and copper electroplating. The fabrication process to improve the quality factor of the inductor is also developed. The achieved inductance varies within a range from 0.5 nH to 2.8 nH, and the maximum Q factor is over 10.

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부하추종형 고효율 지열히트펌프 시스템에 관한 연구 (1) (A Study on the High Efficiency Ground Source Heat Pump System (1))

  • 고득용;김욱중;최상규;장기창
    • 신재생에너지
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    • 제1권4호
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    • pp.30-37
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    • 2005
  • Cycle simulation of Ground Source Heat Pump[GSHP] system was carried out to determine the design specification of basic components such as turbo compressor and heat exchangers. Part load operation characteristics of the designed GSHP system was estimated using the compressor and heat exchanger performance data. A 50RT class turbo compressor for GSHP system is now under development, in which R134a refrigerant is adopted as working fluid. The compressor with variable cascade diffusers is designed to work both in cooling and heating modes so that it can actively keep up with the climate change with high efficiency. The normal running speeds of the compressor are 59000rpm for heating mode and 70000rpm for tooling mode respectively. It has two identical impellers at both ends of the rotor so as to minimize aero-induced thrust force effectively. GSHP system was coupled with a vortical type heat exchanger, and heat gain and heat loss from ground were evaluated per a bore hole. For the optimal integration of the heat pump system, its header for circulating fluid was combined with the ground heat exchangers in parallel and series configuration.

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Sensor enriched infrastructure system

  • Wang, Ming L.;Yim, Jinsuk
    • Smart Structures and Systems
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    • 제6권3호
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    • pp.309-333
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    • 2010
  • Civil infrastructure, in both its construction and maintenance, represents the largest societal investment in this country, outside of the health care industry. Despite being the lifeline of US commerce, civil infrastructure has scarcely benefited from the latest sensor technological advances. Our future should focus on harnessing these technologies to enhance the robustness, longevity and economic viability of this vast, societal investment, in light of inherent uncertainties and their exposure to service and even extreme loadings. One of the principal means of insuring the robustness and longevity of infrastructure is to strategically deploy smart sensors in them. Therefore, the objective is to develop novel, durable, smart sensors that are especially applicable to major infrastructure and the facilities to validate their reliability and long-term functionality. In some cases, this implies the development of new sensing elements themselves, while in other cases involves innovative packaging and use of existing sensor technologies. In either case, a parallel focus will be the integration and networking of these smart sensing elements for reliable data acquisition, transmission, and fusion, within a decision-making framework targeting efficient management and maintenance of infrastructure systems. In this paper, prudent and viable sensor and health monitoring technologies have been developed and used in several large structural systems. Discussion will also include several practical bridge health monitoring applications including their design, construction, and operation of the systems.

Engineering of Guangzhou International Finance Centre

  • Kwok, Michael;Lee, Alexis
    • 국제초고층학회논문집
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    • 제6권1호
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    • pp.49-72
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    • 2017
  • The Guangzhou International Finance Centre (IFC) is a landmark building that symbolizes the emerging international strength of Guangzhou, China's third largest city. It is also one of the dual iconic towers along the main axis of Guangzhou Zhujiang New Town. Arup adopted a total engineering approach in embracing sustainability and aiming at high efficiency solutions based on performance-based design principles covering structures, building services, fire engineering, vertical transportation, and façade performance to constitute an efficient and cost-effective overall building design. Through dynamic integration of architectural and engineering principles, Guangzhou IFC represents a pioneering supertall building in China. It adopts a diagrid exoskeleton structural form that is clearly expressed through the building's façade and gives the building its distinctive character. The aerodynamic shape of the building not only presents the aesthetic quality of elegant simplicity, but also reduces the effects of wind, thereby reducing the size and weight of the structure. State-of-the-art advanced engineering methods, such as optimization techniques and nonlinear finite element modelling, were applied in parallel with large-scale experimental programs to achieve an efficient and high-performance design taking into account the constructability and cost-effectiveness for a project of this scale.

복잡한 자료 구조를 지니는 프로그램 슬라이싱 (Program Slicing in the Presence of Complicated Data Structure)

  • 류호연;박중양;박재흥
    • 정보처리학회논문지D
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    • 제10D권6호
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    • pp.999-1010
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    • 2003
  • 프로그램 슬라이싱은 프로그램의 특정 지점에 나타난 변수의 값에 영향을 미치는 문장들을 프로그램으로부터 추출하는 방법이다. 프로그램 슬라이싱은 프로그램 디버깅, 프로그램 테스팅, 프로그램 통합, 병렬 프로그램 실행, 소프트웨어 메트릭스, 역공학, 유지보수 등 여러 응용 분야에 적용할 수 있다. 본 논문에서는 포인터 변수, 포인터 변수가 참조하는 객체, 배열, 구조체가 같은 복잡한 자료구조가 나타나는 프로그램에서 정확한 슬라이스를 추가하기 위한 알고리즘을 제안한다. 복잡한 자료구조가 나타나는 프로그램 상에서 객체의 보다 더 정확한 정적 분석 정보를 생성하기 위해 객체 참조상태 그래프를 제안하고, 그 효율성을 보였다.

병렬화된 Chimera 격자 기법을 이용한 다단 로켓의 단분리 운동 해석 (Numerical Analysis on Separation Dynamics of Multi-stage Rocket System Using Parallelized Chimera Grid Scheme)

  • 고순흠;최성진;김종암;노오현;박정주
    • 한국전산유체공학회:학술대회논문집
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    • 한국전산유체공학회 2002년도 춘계 학술대회논문집
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    • pp.47-52
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    • 2002
  • The supersonic flow around multi-stage rocket system is analyzed using 3-D compressible unsteady flow solver. A Chimera overset grid technique is used for the calculation of present configuration and grid around the core rocket is composed of 3 zones to represent fins in the core rocket. Flow solver is parallelized to reduce the computation time, and an efficient parallelization algorithm for Chimera grid technique is proposed. AUSMPW+ scheme is used for the spatial discretization and LU-SGS for the time integration. The flow field around multi-stage rocket was analyzed using this developed solver, and the results were compared with that of a sequential solver The speed-up ratio and the efficiency were measured in several processors. As a result, the computing speed with 12 processors was about 10 times faster than that of a sequential solver. Developed flow solver is used to predict the trajectory of booster in separation stage. From the analyses, booster collides against core rocket in free separation case. So, additional jettisoning forces and moments needed for a safe separation are examined.

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