• Title/Summary/Keyword: Paper-based packaging

Search Result 228, Processing Time 0.021 seconds

Deep Learning-Based Defects Detection Method of Expiration Date Printed In Product Package (딥러닝 기반의 제품 포장에 인쇄된 유통기한 결함 검출 방법)

  • Lee, Jong-woon;Jeong, Seung Su;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2021.05a
    • /
    • pp.463-465
    • /
    • 2021
  • Currently, the inspection method printed on food packages and boxes is to sample only a few products and inspect them with human eyes. Such a sampling inspection has the limitation that only a small number of products can be inspected. Therefore, accurate inspection using a camera is required. This paper proposes a deep learning object recognition technology model, which is an artificial intelligence technology, as a method for detecting the defects of expiration date printed on the product packaging. Using the Faster R-CNN (region convolution neural network) model, the color images, converted gray images, and converted binary images of the printed expiration date are trained and then tested, and each detection rates are compared. The detection performance of expiration date printed on the package by the proposed method showed the same detection performance as that of conventional vision-based inspection system.

  • PDF

Analysis of Warpage of Fan-out Wafer Level Package According to Molding Process Thickness (몰드 두께에 의한 팬 아웃 웨이퍼 레벨 패키지의 Warpage 분석)

  • Seung Jun Moon;Jae Kyung Kim;Euy Sik Jeon
    • Journal of the Semiconductor & Display Technology
    • /
    • v.22 no.4
    • /
    • pp.124-130
    • /
    • 2023
  • Recently, fan out wafer level packaging, which enables high integration, miniaturization, and low cost, is being rapidly applied in the semiconductor industry. In particular, FOWLP is attracting attention in the mobile and Internet of Things fields, and is recognized as a core technology that will lead to technological advancements such as 5G, self-driving cars, and artificial intelligence in the future. However, as chip density and package size within the package increase, FOWLP warpage is emerging as a major problem. These problems have a direct impact on the reliability and electrical performance of semiconductor products, and in particular, cause defects such as vacuum leakage in the manufacturing process or lack of focus in the photolithography process, so technical demands for solving them are increasing. In this paper, warpage simulation according to the thickness of FOWLP material was performed using finite element analysis. The thickness range was based on the history of similar packages, and as a factor causing warpage, the curing temperature of the materials undergoing the curing process was applied and the difference in deformation due to the difference in thermal expansion coefficient between materials was used. At this time, the stacking order was reflected to reproduce warpage behavior similar to reality. After performing finite element analysis, the influence of each variable on causing warpage was defined, and based on this, it was confirmed that warpage was controlled as intended through design modifications.

  • PDF

The Present Status and Outlook of Nano Technology (나노기술의 국내외 현황과 전망)

  • 김용태
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2001.11a
    • /
    • pp.37-39
    • /
    • 2001
  • 21세기의 벽두부터 국내외적으로 활발히 논의되고 있는 나노기술에 대한 정의를 생각해보는 것으로부터 우리가 나아갈 방향을 살펴보고자 한다. 나노기술이란, 원자 하나 하나 혹은 분자단위의 조작을 통해 1~100nm정도의 범위 안에서 근본적으로 새로운 물질이나 구조체를 만들어 내는 기술을 말한다. 즉 앞으로 우리는 경험해 보지 못한 새로운 현상에 대한 이해를 할 수 있어야 하고, 새로운 물질 자체를 다룰 수 있는 방법이 우리가 해야 할 구체적인 일이 될 것이란 말이 된다. 뿐만 아니라 나노기술은 종래의 정보.통신.전자 분야에서 주로 추구하던 마이크로화와 달리 재료, 기계, 전자, 의학, 약학, 에너지, 환경, 화학, 생물학, 농학, 정보, 보안기술 등 과학기술 분야 전반을 위시하여 사회분야가지 새로운 인식과 철학적인 이해가 필요하게 되었다. 21세기를 맞은 인류가 나아갈 방향을 나노세계에 대한 도전으로 보아야 하며, 과학기술의 새로운 틀을 제공할 것 임에 틀림 없다. 그러나, 이와 같은 나노기술의 출발점을 살펴보면 VLSI기술로 통칭할 수 있는 마이크로전자소자 기술이란 점이다. 국내의 VLSI기술은 메모리기술이라고 해도 과언이 아닐 것이다. 문제는 종래의 메모리기술은 대규모 투자와 집중적인 인력양성을 통해서 세계 최고 수준에 도달 할 수 있었다. 그러나 여기까지 오는 동안 사식 우리는 선진국의 뒷꽁무니를 혼신의 힘을 다해 뒤쫓아 온 결과라고 보아도 틀리지 않는다. 즉, 앞선자를 보고 뒤쫓는 사람은 갈방향과 목표가 분명하므로 최선을 다하면 따라 잡을 수 있다. 그런데 나노기술은 앞선 사람이 없다는 점이 큰 차이이다 따라서 뒷껑무니를 쫓아가는 습성을 가지고는 개척해 나갈 수 없다는 점을 깨닫지 않으면 안된다. 그런 점에서 이 시간 나노기술의 국내외 현황을 살펴보고 우리가 어떻게 할 것인가를 생각해 보는데 의미가 있을 것이다.하여 분석한 결과 기존의 제한된 RICH-DP는 실시간 서비스에 대한 처리율이 낮아지며 서비스 시간이 보장되지 못했다. 따라서 실시간 서비스에 대한 새로운 제안된 기법을 제안하고 성능 평가한 결과 기존의 RICH-DP보다 성능이 향상됨을 확인 할 수 있었다.(actual world)에서 가상 관성 세계(possible inertia would)로 변화시켜서, 완수동사의 종결점(ending point)을 현실세계에서 가상의 미래 세계로 움직이는 역할을 한다. 결과적으로, IMP는 완수동사의 닫힌 완료 관점을 현실세계에서는 열린 미완료 관점으로 변환시키되, 가상 관성 세계에서는 그대로 닫힌 관점으로 유지 시키는 효과를 가진다. 한국어와 영어의 관점 변환 구문의 차이는 각 언어의 지속부사구의 어휘 목록의 전제(presupposition)의 차이로 설명된다. 본 논문은 영어의 지속부사구는 논항의 하위간격This paper will describe the application based on this approach developed by the authors in the FLEX EXPRIT IV n$^{\circ}$EP29158 in the Work-package "Knowledge Extraction & Data mining"where the information captured from digital newspapers is extracted and reused in tourist information context.terpolation performance of CNN was relatively better than NN.콩과 자연 콩이 성분 분석에서 차이를 나타내지 않았다는 점, 네 번째. 쥐를 통한 다양섭취 실험에서 아무런 이상 반응이 없었다는 점등의 결과를 기준으로 알레르기에 대한 개별 검사 없이 안전한

  • PDF

Hybrid Fabrication of Screen-printed Pb(Zr,Ti)O3 Thick Films Using a Sol-infiltration and Photosensitive Direct-patterning Technique (졸-침투와 감광성 직접-패턴 기술을 이용하여 스크린인쇄된 Pb(Zr,Ti)O3 후막의 하이브리드 제작)

  • Lee, J.-H.;Kim, T.S.;Park, H.-H.
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.22 no.4
    • /
    • pp.83-89
    • /
    • 2015
  • In this paper, we propose a fabrication technique for enhanced electrical properties of piezoelectric thick films with excellent patterning property using sol-infiltration and a direct-patterning process. To achieve the needs of high-density and direct-patterning at a low sintering temperature (< $850^{\circ}C$), a photosensitive lead zirconate titanate (PZT) solution was infiltrated into a screen-printed thick film. The direct-patterned PZT films were clearly formed on a locally screen-printed thick film, using a photomask and UV light. Because UV light is scattered in the screen-printed thick film of a porous powder-based structure, there are needs to optimize the photosensitive PZT sol infiltration process for obtaining the enhanced properties of PZT thick film. By optimizing the concentration of the photosensitive PZT sol, UV irradiation time, and solvent developing time, the hybrid films prepared with 0.35 M of PZT sol, 4 min of UV irradiation and 15 sec solvent developing time, showed a very dense with a large grain size at a low sintering temperature of $800^{\circ}C$. It also illustrated enhanced electrical properties (remnant polarization, $P_r$, and coercive field, $E_c$). The $P_r$ value was over four times higher than those of the screen-printed films. These films integrated on silicon wafer substrate could give a potential of applications in micro-sensors and -actuators.

A Study on the Parameters of Design for Warpage reduction of Passive components Embedded Substrate for PoP (PoP용 패시브 소자 임베디드 기판의 warpage 감소를 위한 파라메타 설계에 관한 연구)

  • Cho, Seunghyun;Kim, Dohan;Oh, Youngjin;Lee, Jongtae;Cha, Sangsuk
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.22 no.1
    • /
    • pp.75-81
    • /
    • 2015
  • In this paper, numerical analysis by finite element method and parameter design by the Taguchi method were used to reduce warpage of a two passive components embedded double side substrate for PoP(Package on Package). The effect of thickness of circuit layers (L1, L2) and thickness of solder resist (SR_top, SR_BTM) were analyzed with 4 variations and 3 levels(minimum, average and maximum thickness) to find optimized thickness conditions. Also, paste effect of solder resist on unit area of top surface was analyzed. Finally, experiments was carried out to prove numerical analysis and the Taguchi method. Based on the numerical and experimental results, it was known that circuit layer in ball side of substrate was the most severe determining deviation for reducing warpage. Buried circuit layer in chip side, solder resist and were insignificant effects on warpage relatively. However, warpage decreased as circuit layer in ball side thickness increased but effect of solder resist and circuit layer in chip side thickness were conversely.

Fabrication and Characterization of Organic Solar Cells with Gold Nanoparticles in PEDOT:PSS Hole Transport Layer (PEDOT:PSS 정공 수송층에 금 나노입자를 첨가한 유기태양전지의 제작 및 특성 연구)

  • Kim, Seung Ho;Choi, Jae Young;Chang, Ho Jung
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.20 no.2
    • /
    • pp.39-46
    • /
    • 2013
  • In this paper, organic solar cells(OSCs) based on bulk-heterojunction structures were fabricated by spin coating method using polymer P3HT and fullerene PCBM as a photoactive layer. The fabricated OSCs had a simple glass/ITO/PEDOT:PSS/P3HT:PCBM/Al structures. The photoactive layer of mixed P3HT:PCBM was formed with 1:1 weight ratio. The hole transport layer(HTL) was used conducting polymer PEDOT:PSS concentration with gold nanoparticles. The annealing temperature and concentration of nanoparticles in HTL were verified to improve the OSC characterization. The percentage of gold nanoparticles in HTL were 0.5 wt% and 1.0 wt%, and the surface morphology, electrical properties and absorption intensities were investigated. The devices were 0.5 wt%, and the highest 3.1% of the powder conversion efficiency(PCE), 10.2 $mA/cm^2$ of the maximum short circuit current density($J_{SC}$), 0.535V of the open circuit voltage($V_{OC}$) and 55.8% of the fill factor(F.F) could be obtained when the nanoparticle concertration was 0.5 wt%. The annealing temperature of HTL was $110^{\circ}C$, $130^{\circ}C$, $150^{\circ}C$ in vacuum oven and measured the absorption intensities, surface morphology, crystallinity and electrical properties were investigated. The best property was obtained in HTL annealed at $130^{\circ}C$ for gold nanoparticles of 0.5 wt%, showing that $J_{SC}$, $V_{OC}$, F.F and PCE were about 12.0 $mA/cm^2$, 0.525V, 64.2% and 4.0%, respectively.

A Micro Fluxgate Magnetic Sensor with Closed Magnetic Path (폐자로를 형성한 마이크로 플럭스게이트 자기 센서)

  • 최원열;황준식;강명삼;최상언
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.9 no.3
    • /
    • pp.19-23
    • /
    • 2002
  • This paper presents a micro fluxgate magnetic sensor in printed circuit board (PCB). In order to observe the effect of the closed magnetic path, the magnetic cores of rectangular-ring and two bars were each fabricated. Each fluxgate sensor consists of five PCB stack layers including one layer magnetic core and four layers of excitation and pick-up coils. The center layer as a magnetic core is made of a Co-based amorphous magnetic ribbon with extremely high DC permeability of ~100,000. Four outer layers as an excitation and pick-up coils have a planar solenoid and are made of copper foil. In case of the fluxgate sensor having the rectangular-ring shaped core, excellent linear response over the range of -100 $\mu$T to + 100 $\mu$T is obtained with 540 V/Tsensitivity at excitation square wave of 3 $V_{p-p}$ and 360 KHz. The chip size of the fabricated sensing element is $7.3 \times 5.7\textrm{mm}^2$. The very low power consumption of ~8 mW was measured. This magnetic sensor is very useful for various applications such as: portable navigation systems, telematics, VR game and so on.n.

  • PDF

Three-dimensional Machine Vision System based on moire Interferometry for the Ball Shape Inspection of Micro BGA Packages (마이크로 BGA 패키지의 볼 형상 시각검사를 위한 모아레 간섭계 기반 3차원 머신 비젼 시스템)

  • Kim, Min-Young
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.19 no.1
    • /
    • pp.81-87
    • /
    • 2012
  • This paper focuses on three-dimensional measurement system of micro balls on micro Ball-Grid-Array(BGA) packages in-line. Most of visual inspection system still suffers from sophisticate reflection characteristics of micro balls. For accurate shape measurement of them, a specially designed visual sensor system is proposed under the sensing principle of phase shifting moire interferometry. The system consists of a pattern projection system with four projection subsystems and an imaging system. In the projection system, four subsystems have spatially different projection directions to make target objects experience the pattern illuminations with different incident directions. For the phase shifting, each grating pattern of subsystem is regularly moved by PZT actuator. To remove specular noise and shadow area of BGA balls efficiently, a compact multiple-pattern projection and imaging system is implemented and tested. Especially, a sensor fusion algorithm to integrate four information sets, acquired from multiple projections, into one is proposed with the basis of Bayesian sensor fusion theory. To see how the proposed system works, a series of experiments is performed and the results are analyzed in detail.

Measurement of Flexural Modulus of Lamination Layers on Flexible Substrates (유연 기판 위 적층 필름의 굽힘 탄성계수 측정)

  • Lee, Tae-Ik;Kim, Cheolgyu;Kim, Min Sung;Kim, Taek-Soo
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.23 no.3
    • /
    • pp.63-67
    • /
    • 2016
  • In this paper, we present an indirect method of elastic modulus measurement for various lamination layers formed on polymer-based compliant substrates. Although the elastic modulus of every component is crucial for mechanically reliable microelectronic devices, it is difficult to accurately measure the film properties because the lamination layers are hardly detached from the substrate. In order to resolve the problem, 3-point bending test is conducted with a film-substrate specimen and area transformation rule is applied to the cross-sectional area of the film region. With known substrate modulus, a modulus ratio between the film and the substrate is calculated using bending stiffness of the multilayered specimen obtained from the 3-point bending test. This method is verified using electroplated copper specimens with two types of film-substrate structure; double-sided film and single sided film. Also, common dielectric layers, prepreg (PPG) and dry film solder resist (DF SR), are measured with the double-sided specimen type. The results of copper (110.3 GPa), PPG (22.3 GPa), DF SR (5.0 GPa) were measured with high precision.

Reliability Assessment and Prediction of Solder Joints in High Temperature Heaters (고온히터 솔더접합부의 신뢰성 평가 및 예측)

  • Park, Eunju;Kwon, Daeil;Sa, Yoonki
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.24 no.2
    • /
    • pp.23-27
    • /
    • 2017
  • This paper proposes an approach to predict the reliability of high temperature heaters by identifying their primary failure modes and mechanisms in the field. Test specimens were designed to have the equivalent stress conditions with the high temperature heaters in the field in order to examine the effect of stress conditions on the solder joint failures. There failures often result from cracking due to intermetallic compound (IMC) or void formation within a solder joint. Aging tests have been performed by exposing the test specimens to a temperature of $170^{\circ}C$ in order to reproduce solder joint failures in the field. During the test, changes in IMC formation were investigated by scanning electron microscopy (SEM) on the cross-sections of the test specimens, while changes in void formation were monitored both by resistance spectroscopy and by micro-computed tomography (microCT), alternately. The test results demonstrated the void volume within the solder increased as the time at the high temperature increased. Also, the phase shift of high frequency resistance was found to have high correlation with the void volume. These results implied the failure of high temperature heaters can be non-destructively predicted based on the correlation.