• Title/Summary/Keyword: Packaging process

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Analysis of Frequency Response Depending on Wire-bonding Length Variation (Wire-bonding의 길이 변화에 따른 주파수별 특성 분석)

  • Gwon, Eun-Jin;Mun, Jong-Won;Ryu, Jong-In;Park, Se-Hoon;Kim, Jun-Chul
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.551-552
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    • 2008
  • This paper presets a results of frequency response in variation of wire bonding length. A gold ball bonding is used as a wire bonding process, and a DPDT(double pole double thru) switch is adapted as a device for test. Wire length is ranged from 442um to 833um and a measured frequency range is from 1 GHz to 6 GHz. Little difference are measured in insertion loss and return loss depending on wire length. Measured S21 and S11 are -0.58 dB and -17.7 dB, respectively. S21 insertion loss is rising up and S11 insertion loss is falling down as the frequency is increased.

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Flexible wireless pressure sensor module

  • Shin Kyu-Ho;Moon Chang-Ryoul;Lee Tae-Hee;Lim Chang-Hyun;Kim Young-Jun
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2004.11a
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    • pp.3-4
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    • 2004
  • A flexible Packaging scheme, which embedded chip packaging, has been developed using a thinned silicon chip. Mechanical characteristics of thinned silicon chips are examined by bending test and finite element analysis. Thinned silicon chips ($t<50{\mu}m$) are fabricated by chemical etching process to avoid possible surface damages on them. These technologies can be use for a real-time monitoring of blood pressure. Our research targets are implantable blood pressure sensor and its telemetric measurement. By winding round the coronary arteries, we can measure the blood pressure by capacitance variation of blood vessel.

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Laser Drilling of High-Density Through Glass Vias (TGVs) for 2.5D and 3D Packaging

  • Delmdahl, Ralph;Paetzel, Rainer
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.2
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    • pp.53-57
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    • 2014
  • Thin glass (< 100 microns) is a promising material from which advanced interposers for high density electrical interconnects for 2.5D chip packaging can be produced. But thin glass is extremely brittle, so mechanical micromachining to create through glass vias (TGVs) is particularly challenging. In this article we show how laser processing using deep UV excimer lasers at a wavelength of 193 nm provides a viable solution capable of drilling dense patterns of TGVs with high hole counts. Based on mask illumination, this method supports parallel drilling of up over 1,000 through vias in 30 to $100{\mu}m$ thin glass sheets. (We also briefly discuss that ultrafast lasers are an excellent alternative for laser drilling of TGVs at lower pattern densities.) We present data showing that this process can deliver the requisite hole quality and can readily achieve future-proof TGV diameters as small $10{\mu}m$ together with a corresponding reduction in pitch size.

A study on Electrical Characteristic and Thermal Shock Property of TSV for 3-Dimensional Packaging (3차원 패키징용 TSV의 열응력에 대한 열적 전기적 특성)

  • Jeong, Il Ho;Kee, Se Ho;Jung, Jae Pil
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.2
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    • pp.23-29
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    • 2014
  • Less power consumption, lower cost, smaller size and more functionality are the increasing demands for consumer electronic devices. The three dimensional(3-D) TSV packaging technology is the potential solution to meet this requirement because it can supply short vertical interconnects and high input/output(I/O) counts. Cu(Copper) has usually been chosen to fill the TSV because of its high conductivity, low cost and good compatibility with the multilayer interconnects process. However, the CTE mismatch and Cu ion drift under thermal stress can raise reliability issues. This study discribe the thermal stress reliability trend for successful implementation of 3-D packaging.

A Comparative Analysis of Artificial Neural Network (ANN) Architectures for Box Compression Strength Estimation

  • By Juan Gu;Benjamin Frank;Euihark Lee
    • KOREAN JOURNAL OF PACKAGING SCIENCE & TECHNOLOGY
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    • v.29 no.3
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    • pp.163-174
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    • 2023
  • Though box compression strength (BCS) is commonly used as a performance criterion for shipping containers, estimating BCS remains a challenge. In this study, artificial neural networks (ANN) are implemented as a new tool, with a focus on building up ANN architectures for BCS estimation. An Artificial Neural Network (ANN) model can be constructed by adjusting four modeling factors: hidden neuron numbers, epochs, number of modeling cycles, and number of data points. The four factors interact with each other to influence model accuracy and can be optimized by minimizing model's Mean Squared Error (MSE). Using both data from the literature and "synthetic" data based on the McKee equation, we find that model estimation accuracy remains limited due to the uncertainty in both the input parameters and the ANN process itself. The population size to build an ANN model has been identified based on different data sets. This study provides a methodology guide for future research exploring the applicability of ANN to address problems and answer questions in the corrugated industry.

Exploring R&D Policy Directions for Semiconductor Advanced Packaging in Korea Based on Expert Interviews (국내 반도체 첨단패키징 R&D 정책방향: 산학연 전문가 조사를 중심으로)

  • S.J. Min;J.H. Park;S.S. Choi
    • Electronics and Telecommunications Trends
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    • v.39 no.3
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    • pp.1-12
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    • 2024
  • As the demand for high-performance semiconductors, such as chips for artificial intelligence and high-bandwidth memory devices, increases along with the limitations of ultrafine processing technology in the semiconductor in-line process, advanced packaging becomes an increasingly important breakthrough technology for further improving semiconductor performance. Major countries, including Korea, the United States, Taiwan, and China, and large companies are strengthening their technological industry capabilities through the development of advanced packaging technology and policy support. Nevertheless, Korea has a lower level of development of related technologies by approximately 66% compared with the most advanced countries. Therefore, we aim to discover the needs for an advanced packaging research and development (R&D) policy through written expert interviews and importance satisfaction analysis. As a result, various implications for R&D policy directions are suggested to strengthen the technological capabilities and R&D ecosystem of the Korean advanced packaging technology.

Analysis of the Causes of Deformation of Packaging Materials Used for Ready-to-Eat Foods after Microwave Heating (즉석편의 식품용 포장재의 전자레인지 가열에 의한 변형 원인 분석)

  • Yoon, Chan Suk;Hong, Seung In;Cho, Ah Reum;Lee, Hwa Shin;Park, Hyun Woo;Lee, Keun Taik
    • Korean Journal of Food Science and Technology
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    • v.47 no.1
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    • pp.63-69
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    • 2015
  • The aim of this study was to investigate the deformation of packaging materials used for ready-to-eat (RTE) foods after the retort process and microwave heating. From the multilayer films consisting of polyethylene terephthalate (PET), polyamide (PA), and cast polypropylene (CPP) in a stand-up pouch form used for RTE foods, some deformation of the CPP layer, which was in direct contact with the food, was observed after the retort process and microwave heating. The damage was more severely caused by microwave heating than by the retort process. This may be attributed to diverse factors including the non-uniform heating in a microwave oven, the sorption of oil into the packaging film, and the different characteristics of food components such as viscosity, salt and water content. The development of heat-resistant packaging materials and systems suitable for microwave heating of RTE foods is required for the safety of consumers.

Optical Packaging and Interconnection Technology (광 패키징 및 인터커넥션 기술)

  • Kim, Dong Min;Ryu, Jin Hwa;Jeong, Myung Yung
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.4
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    • pp.13-18
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    • 2012
  • By the need for high-speed data transmission in PCB, the studies on the optical PCB has been conducted with optical interconnection and its packaging technology. Particularly, the polymer-based optical interconnection has been extensively studied with the advantages such as cost-effective and ease of process. For high-efficiency and passive alignment, the studies were performed using the 45 degree mirrors, MT connector, and etc. In this work, integrated PLC device and fiber alignment array block was fabricated by using imprint technology to solve the alignment and array problem of optical device and the optical fiber. The fabricated integrated block for optical interconnection of PLC device has achieved higher precision of decreasing the dimensional error of the patterns by optimization of process and its insertion loss has an average value of 4.03dB, lower than criteria specified by international standard. In addition, a optical waveguide with built-in lens has been proposed for high-efficiency and passive alignment. By simulation, it was confirmed that the proposed structure has higher coupling efficiency than conventional no-lens structure and has the broad tolerance for the spatial offset of optical waveguide.

Fabrication and Challenges of Cu-to-Cu Wafer Bonding

  • Kang, Sung-Geun;Lee, Ji-Eun;Kim, Eun-Sol;Lim, Na-Eun;Kim, Soo-Hyung;Kim, Sung-Dong;Kim, Sarah Eun-Kyung
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.2
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    • pp.29-33
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    • 2012
  • The demand for 3D wafer level integration has been increasing significantly. Although many technical challenges of wafer stacking are still remaining, wafer stacking is a key technology for 3D integration due to a high volume manufacturing, smaller package size, low cost, and no need for known good die. Among several new process techniques Cu-to-Cu wafer bonding is the key process to be optimized for the high density and high performance IC manufacturing. In this study two main challenges for Cu-to-Cu wafer bonding were evaluated: misalignment and bond quality of bonded wafers. It is demonstrated that the misalignment in a bonded wafer was mainly due to a physical movement of spacer removal step and the bond quality was significantly dependent on Cu bump dishing and oxide erosion by Cu CMP.

Flexible and Embedded Packaging of Thinned Silicon Chip (초 박형 실리콘 칩을 이용한 유연 패키징 기술 및 집적 회로 삽입형 패키징 기술)

  • 이태희;신규호;김용준
    • Journal of the Microelectronics and Packaging Society
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    • v.11 no.1
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    • pp.29-36
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    • 2004
  • A flexible packaging scheme, which includes chip packaging, has been developed using a thinned silicon chip. Mechanical characteristics of thinned silicon chips are examined by bending tests and finite element analysis. Thinned silicon chips (t<30 $\mu\textrm{m}$) are fabricated by chemical etching process to avoid possible surface damages on them. And the chips are stacked directly on $Kapton^{Kapton}$film by thermal compressive bonding. The low height difference between the thinned silicon chip and $Kapton^{Kapton}$film allows electroplating for electrical interconnection method. Because the 'Chip' is embedded in the flexible substrate, higher packaging density and wearability can be achieved by maximized usable packaging area.

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