• Journal of the Microelectronics and Packaging Society
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• v.28 no.4
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• pp.63-67
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• 2021

In order to detect fires that may not be visible to the naked eye, an IoT module that uses changes in Carbon dioxide (CO₂) levels and temperature to effectively identify ambers (dying flames) was developed. Finite element analysis was then used to optimize the packaging for this module. Given the nature of ambers, the low power long range LoRa (Long Range) technology was used in the development of this module. To protect the module, a number of packages were designed, and comparative analysis performed on the stress generated when they fall. The results of which show that Model C showed the lowest stress. In addition, unlike other models in which stress concentration was predicted in the module mounting part of the package, in this model the stress concentration phenomenon was predicted in the wing part. It was therefore determined that this approach is ideal for protecting the internal module, and a package to which this was applied was manufactured.

• Journal of the Microelectronics and Packaging Society
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• v.29 no.1
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• pp.1-6
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• 2022

The mobile device industry demands much higher levels of integration and lower costs coupled with a growing awareness of the complete system's configuration. A subsystem module package is similar to a board-level circuit that integrates a system function in a package beyond a System-in-Package (SiP) design. It is an advanced IC packaging solution to enhance the PDN and achieve a smaller form factor. Unlike a system-level design with a decoupling capacitor, a subsystem module package system needs to redefine the role of the capacitor and its configuration for PDN performance. Specifically, the design of package's form factor should include careful consideration of optimal PDN performance and the number of components, which need to define the decoupling capacitor's value and the placement strategy for a low impedance profile with associated cost benefits. This paper will focus on both the static case that addresses the voltage (IR) drop and AC analysis in the frequency domain with three specific topics. First, it will highlight the role of simulation in the subsystem module design for the PDN. Second, it will compare the performance of double-sided component placement (DSCP) motherboards with the subsystem module package and then prove the advantage of the subsystem module package. Finally, it will introduce three-terminal decoupling capacitor (decap) configurations of capacitor size, count and value for the subsystem module package to determine the optimum performance and package density based on the cost-effective model.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2006.10a
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• pp.213-231
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• 2006

• The monthly packaging world
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• s.85
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• pp.100-104
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• 2000

• The monthly packaging world
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• s.85
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• pp.117-123
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• 2000

• The monthly packaging world
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• s.85
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• pp.124-131
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• 2000

• Journal of the Microelectronics and Packaging Society
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• v.9 no.1
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• pp.15-20
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• 2002

In this project, we hale developed various techniques for subminiaturization, surface implementation, high frequency design, small-size SMD, performance test and application of the Dual PLL module, which is a core component for the personal communication systems. We also obtained base techniques for the next-generation Dual PLL module design and fabrication techniques for an internationally competitive subminiature Dual PLL module.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.04a
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• pp.193-197
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• 2003

As one of the core technologies in the field of the optical communication with WDM, the optical cross connector with movements of micro mirrors is getting important day by day. The packaging structure of 2-dimensional NxN MOEMS switch should be determined by the harmonization of the following items such as the geometrical compatability between optical and structural components, the characteristics of optical input and output parts with device, and the electrical performance for the operation of micro mirrors. Therefore, the packaging process could be defined as the integrated technology completed by the optical and electrical science and the material science for the understanding of its thermo-mechanical properties with packaging materials. In the present study, the harmonization between the optical and structural components as well as the optical characteristics of lens system used will be investigated.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.05a
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• pp.74-78
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• 2002

MEMS공정을 이용하여 폴리실리콘의 piezoresistivity를 이용한 스트레인 센서어레이를 제작하였고, 이 센서 어레이를 flexible substrate에 패키징하는 공정을 개발하였다. 실리콘 웨이퍼에 표면 가공(surface micromachining)된 센서는 폴리이미드 코팅, release-etch 방법을 통해 웨이퍼로부터 분리되어 폴리이미드를 기판으로 하는 flexible sensor array module을 완성할 수 있었다. 공정은 희생층과 절연층을 증착하고 폴리실리콘 0.5 $\mu\textrm{m}$을 증착, 도핑 및 패터닝하여 센서 어레이를 구성하였다. 이 센서어레이를 flexible substrate에 패키징 하기 위해서 폴리이미드를 코팅하여 15 $\mu\textrm{m}$의 막을 구성하였고, 100% $O_2$RIE를 이용한 선택적 식각 방법으로 via hole을 구성하였다. 이후 전기도금을 통해 회로를 구성하여 1단계 패키징(die to chip carrier)과 2단계 패키징(chip to substrate)을 웨이퍼 레벨에서 완성하였다. 희생층을 제거함으로서 웨이퍼로부터 센서어레이 모듈을 분리하였다. 제작되어진 센서 모듈은 임의의 곡면에 실장이 가능하도록 충분한 flexibility를 얻을 수 있었다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.3
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• pp.234-238
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• 2014

Multichip packaging was achieved the best solution to significantly reduce thermal resistance at the same time, to increase luminance intensity in LEDs packaging application. For the packaging, thermal spreading resistance is an important parameter to get influence the total thermal performance of LEDs. In this study, silicon-based multichip light emitting diodes (LEDs) packaged module has been examined for thermal characteristics in several parameters. Compared to the general conventional single LED packaged chip module, multichip LED packaged module has many advantages of low cost, low density, small size, and low thermal resistance. This analyzed module is comprised of multichip LED array, which consists of 32 LED packaged chips with supplement power of 0.2 W at every single chip. To realize the extent of thermal distribution, the computer-aided design model of 6.4 W Si-based multichip LED module was designed and was performed by the simulation basis of actual fabrication flow. The impact of thermal distribution is analyzed in alternative ways both optimizing numbers of fins and the thickness of that heatsink. In addition, a thermal resistance model was designed and derived from analytical theory. The optimum simulation results satisfies the expectations of the design goal and the measurement of IR camera results. tart after striking space key 2 times.