• Journal of the Microelectronics and Packaging Society
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• v.24 no.4
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• pp.91-95
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• 2017

Package-On-Package (PoP) technology is developing toward smaller form factors with high-speed data transfer capabilities to cope with high DDR4x memory capacity. The common application processor (AP) used for PoP devices in smartphones has the bottom package as logic and the top package as memory, which requires both thermally and electrically enhanced functions. Therefore, it is imperative that PoP designs consider both thermal and power distribution network (PDN) issues. Stacked packages have poorer thermal dissipation than single packages. Since the bottom package usually has higher power consumption than the top package, the bottom package impacts the thermal budget of the top package (memory). This paper investigates the thermal and electrical characteristics of PoP designs, particularly the bottom package. Findings include that via and dense via-cluster volume have an important role to lower thermal resistance to the motherboard, which can be an effective way to manage chip hot spots and reduce the thermal impact on the memory package. A Cu block and dense via-cluster layout with an optimal location are proposed to drain the heat from the chip hot spots to motherboard which will enhance thermal and electrical performance at the design stage. The analytical thermal results can be used for design guidelines in 3D packaging.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.3
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• pp.43-49
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• 2016

Reliability characteristics of thin package-on-packages were evaluated using T/H (temperature/humidity) test at $85^{\circ}C/85%$ for 500 hours, TC (temperature cycling) test at $-40{\sim}100^{\circ}C$ for 1,000 cycles, and HTS (high temperature storage) test at $155^{\circ}C$ for 1,000 hours. The average resistance of the solder-bump circuitry between the top and bottom packages of 24 package-on-package (PoP) samples, which were processed using polyimide thermal tape, was $0.56{\pm}0.05{\Omega}$ and quite similar for all 24 samples. Open failure of solder joints did not occur after T/H test for 500 hours, TC test for 1,000 cycles, and HTS test for 1,000 hours, respectively.

• Communications of Mathematical Education
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• v.21 no.2 s.30
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• pp.199-225
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• 2007

We can use R package as a statistical package on the education of probability and statistics in elementary, middle and high school mathematics. R is an interactive mode package and graphical presentation tools in R are powerful. The greatest advantage is that R is a general public license package. We need to consider R package as a standard statistical package on the education of probability and statistics in elementary, middle and high school mathematics.

• Journal of the military operations research society of Korea
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• v.17 no.2
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• pp.100-112
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• 1991

Software system is a hierarchical structure with collection of program units. Software system can import external packages globally or locally depending on the usage within a system. If the imported package is used globally, the soft-ware system can be influenced globally by any change of package and programmer's debugging time for the program maintenance will be greater. To solve these problems, it is desirable to use the imported package locally right on the usage point within the system. The model presented in this paper analyzed entity usage of package in structure of program, identified the usage level to obtain localization and provided information for restructure of the program to localize package usage. To obtain localization, it identified declared entities inside the imported package and analyzed the specification and body part of program unit to identify entities referenced from the imported package. The proposed model can be used to improve the maintainability of software system and contributed to reduction of programmer's debugging time in program maintenance.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.3
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• pp.63-69
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• 2013

The warpage of a bottom package of Package on Package(PoP) where a chip was mounted to a substrate by flip chip process was compared to that of a bottom package for which a chip was bonded to a substrate using die attach film(DAF). At the solder reflow temperature of $260^{\circ}C$, the packages processed with flip chip bonding and DAF bonding exhibited warpages of $57{\mu}m$ and $-102{\mu}m$, respectively. At the temperature range between room temperature and $260^{\circ}C$, the packages processed with flip chip bonding and DAF bonding exhibited warpage values ranging from $-27{\mu}m$ to $60{\mu}m$ and from $-50{\mu}m$ to $-15{\mu}m$, respectively.

• Journal of the Korean Society of Industry Convergence
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• v.2 no.2
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• pp.131-137
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• 1999

Package crack caused by the soldering process in the surface mounting plastic package is evaluated by applying the energy release rate criterion. The package crack formation depend on various parameters such as chip set, chip size, package thickness, package width, material properties and the moisture content etc. The effects of chip set and the other parameters were estimated during the analysis of package cracks which were located in the edge of the upper interface of the chip and the lower interlace of the die pad. From the results, it could be obtained that the more significant parameters to effect the chip set are chip width.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.2410-2413
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• 2005

Finite element method (FEM) has been widely used as a useful numerical method that can analyze complex engineering problems in electro-magnetics, mechanics, and others. CEMTool, which is similar to MATLAB, is a command style design and analyzing package for scientific and technological algorithm and a matrix based computation language. In this paper, we present new 3D FEM package in CEMTool environment. In contrast to the existing CEMTool 2D FEM package and MATLAB PDE (Partial Differential Equation) Toolbox, our proposed 3D FEM package can deal with complex 3D models, not a cross-section of 3D models. In the pre-processor of 3D FEM package, a new 3D mesh generating algorithm can make information on 3D Delaunay tetrahedral mesh elements for analyses of 3D FEM problems. The solver of the 3D FEM package offers three methods for solving the linear algebraic matrix equation, i.e., Gauss-Jordan elimination solver, Band solver, and Skyline solver. The post-processor visualizes the results for 3D FEM problems such as the deformed position and the stress. Consequently, with our new 3D FEM toolbox, we can analyze more diverse engineering problems which the existing CEMTool 2D FEM package or MATLAB PDE Toolbox can not solve.

• Journal of the Microelectronics and Packaging Society
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• v.29 no.1
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• pp.1-6
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• 2022

The mobile device industry demands much higher levels of integration and lower costs coupled with a growing awareness of the complete system's configuration. A subsystem module package is similar to a board-level circuit that integrates a system function in a package beyond a System-in-Package (SiP) design. It is an advanced IC packaging solution to enhance the PDN and achieve a smaller form factor. Unlike a system-level design with a decoupling capacitor, a subsystem module package system needs to redefine the role of the capacitor and its configuration for PDN performance. Specifically, the design of package's form factor should include careful consideration of optimal PDN performance and the number of components, which need to define the decoupling capacitor's value and the placement strategy for a low impedance profile with associated cost benefits. This paper will focus on both the static case that addresses the voltage (IR) drop and AC analysis in the frequency domain with three specific topics. First, it will highlight the role of simulation in the subsystem module design for the PDN. Second, it will compare the performance of double-sided component placement (DSCP) motherboards with the subsystem module package and then prove the advantage of the subsystem module package. Finally, it will introduce three-terminal decoupling capacitor (decap) configurations of capacitor size, count and value for the subsystem module package to determine the optimum performance and package density based on the cost-effective model.

• Design Convergence Study
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• v.16 no.4
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• pp.81-98
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• 2017

This study starts from the judgment that the evaluation about preserved flower package design has to be performed based on the product attribute. The principles and components of package design are reestablished from preceding researches, the product type model is suggested based on the product attribute. The 6 principles of package design are usability, esthetic element, attracting attention, creativity, identity and implication, and the 5 components of package design are form, material, color, graphics and branding factors. The product types are classified into 4 areas following the 2 axises. The 1 axis means the degree of perception risk on acquiring information and the other means the approaching type to expected effects about products. The characteristics of package design components are analyzed from the cases belonged at each area on the product type model. Based on the this model, the strategy of preserved flower package design is drawn. At last the package of 'Preserville' is analyzed, we find out the critical points and suggest the intention point in planning the preserved flower package.

• Journal of Korea Technology Innovation Society
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• v.3 no.3
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• pp.1-17
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• 2000

This paper shows the institutional limits of technological innovation at the railway package service, that is the limits of introducing the package express system. The railway package service, owned by government and operated by D company, has been suffered severe operating loss since early 1990's. The package express system supported by information network and co-working with inner city quick service might be an solution for the railway package service. But there are several obstacles such as labor union and the rigidities of the Korean National Railroad of government agency.