• Title/Summary/Keyword: Package Level Test

Search Result 223, Processing Time 0.031 seconds

Reliability Assessment and Improvement of MEMS Vacuum Package with Accelerated Degradation Test (ADT) (가속열화시험을 적용한 MEMS 진공패키지의 신뢰성 분석 및 개선)

  • 최민석;김운배;정병길;좌성훈;송기무
    • Journal of Applied Reliability
    • /
    • v.3 no.2
    • /
    • pp.103-116
    • /
    • 2003
  • We carry out reliability tests and investigate the failure mechanisms. of the wafer level vacuum packaged MEMS gyroscope sensor using an accelerated degradation test. The accelerated degradation test (ADT) is used to evaluate reliability (and/or life) of the MEMS vacuum package and to select the accelerated test conditions, which reduce the reliability testing time. Using the failure distribution model and stress-life model, we are able to estimate the average life time of the vacuum package, which is well agreed with the measured data. After improving several package reliability issues such as prevention of gas diffusion through package, we carry out another set of accelerated tests at the chosen acceleration level. The results show that reliability of the vacuum packaged gyroscope has been greatly improved and can survive without degradation of performance, which is the Q-factor in gyroscope sensor, during environmental stress reliability tests.

  • PDF

Safety Evaluation of Radioactive Material Transport Package under Stacking Test Condition (방사성물질 운반용기의 적층시험조건에 대한 안전성 평가)

  • Lee, Ju-Chan;Seo, Ki-Seog;Yoo, Seong-Yeon
    • Journal of Nuclear Fuel Cycle and Waste Technology(JNFCWT)
    • /
    • v.10 no.1
    • /
    • pp.37-43
    • /
    • 2012
  • Radioactive waste transport package was developed to transport eight drums of low and intermediate level waste(LILW) in accordance with the IAEA and domestic related regulations. The package is classified with industrial package IP-2. IP-2 package is required to undergo a free drop test and a stacking test. After free drop and stacking tests, it should prevent the loss or dispersal of radioactive contents, and loss of shielding integrity which would result in more than 20 % increase in the radiation level at any external surface of the package. The objective of this study is to establish the safety test method and procedure for stacking test and to prove the structural integrities of the IP-2 package. Stacking test and analysis were performed with a compressive load equal to five times the weight of the package for a period of 24 hours using a full scale model. Strains and displacements were measured at the corner fitting of the package during the stacking test. The measured strains and displacements were compared with the analysis results, and there were good agreements. It is very difficult to measure the deflection at the container base, so the maximum deflection of the container base was calculated by the analysis method. The maximum displacement at the corner fitting and deflection at the container base were less than their allowable values. Dimensions of the test model, thickness of shielding material and bolt torque were measured before and after the stacking test. Throughout the stacking test, it was found that there were no loss or dispersal of radioactive contents and no loss of shielding integrity. Thus, the package was shown to comply with the requirements to maintain structural integrity under the stacking condition.

Board Level Reliability Evaluation for Package on Package

  • Hwang, Tae-Gyeong;Chung, Ji-Young
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2007.04a
    • /
    • pp.37-47
    • /
    • 2007
  • Factor : Structure Metal pad & SMO size Board level TC test : - Large SMO size better Board level Drop test : - Large SMO size better Factor : Structure Substrate thickness Board level TC test : - Thick substrate better Board level Drop test : - Substrate thickness is not a significant factor for drop test Factor : Material Solder alloy Board level TC test : - Not so big differences over Pb-free solder and NiAu, OSP finish Board level Drop test : - Ni/Au+SAC105, CuOSP+LF35 are better Factor : Material Pad finish Board level TC test : - NiAu/NiAu is best Board livel Drop test : - CuOSP is best Factor : Material Underfill Board level TC test - Several underfills (reworkable) are passed TCG x500 cycles Board level Drop test : - Underfill lots have better performance than non-underfill lots Factor : Process Multiple reflow Board level TC test : - Multiple reflow is not a significant actor for TC test Board level Drop test : N/A Factor : Process Peak temp Board level TC test : - Higher peak temperature is worse than STD Board level Drop test : N/A Factor : Process Stack method Board level TC test : - No big difference between pre-stack and SMT stack Board level Drop test : - Flux dipping is better than paste dipping but failure rate is more faster

  • PDF

A Study on the Test Device for Improving Test Speed and Repeat Precision of Semiconductor Test Socket (반도체 테스트 소켓의 검사속도 및 반복 정밀도 개선형 검사장치에 관한 연구)

  • Park, Hyoung-Keun
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.22 no.1
    • /
    • pp.327-332
    • /
    • 2021
  • At the package level, semiconductor reliability inspections involves mounting a semiconductor chip package on a test socket. The form of the test socket is basically determined by the form of the chip package. It also acts as a medium to connect with test equipment through mechanical contact of the leads and socket leads in the chip package, and it minimizes signal loss in a signal transmission process so that an inspection signal can be delivered well to the semiconductor. In this study, a technique was applied to examine the interdependence of adjacent electrical transfer routes and the structure of adjacent electrical transfer paths. The goal was to enable short-circuit testing of fewer than 100 silicon test sockets through a single interface for life tests and precision measurements. The test results of the developed device show a test precision of 99% or more and a simultaneous test speed characteristic of 0.66 sec or less.

The Internal Marketing Strategy for the Performance of Medical Service -A Focus on the Compensation Package for the Internal Customers- (의료서비스의 내부마케팅 전략수립을 위한 내부고객세분화와 보상정책의 적용에 관한 연구)

  • Paik, Soo-Kyung
    • Korea Journal of Hospital Management
    • /
    • v.6 no.3
    • /
    • pp.90-108
    • /
    • 2001
  • This research examines the compensation package maximizing the utilities of internal customers by applying the market segmentation theory. Data were collected from four Korean hospitals in Seoul, Pusan and Kyunggi-do. The research is designed to seek the compensation package maximizing the utility of doctors and nurses by applying the market segmentation theory. The compensation package for doctors and nurses was classified into 5 attributes which are level of salary, payment method, education, promotion, reward method. The test results were as follows. First, the relative importance of each attribute in the compensation package is different. The level of salary is the most important, reward method is the next. Second, the utility of doctors increases by 8.7%, when they are segmented on the basis. of their preference for compensation attributes while that of nurses increases by 39.8%. The results of this study imply that the utility of doctors and nurses increases with differentiated compensation package for internal customer segmented by their preference.

  • PDF

A Prediction of Chip Quality using OPTICS (Ordering Points to Identify the Clustering Structure)-based Feature Extraction at the Cell Level (셀 레벨에서의 OPTICS 기반 특질 추출을 이용한 칩 품질 예측)

  • Kim, Ki Hyun;Baek, Jun Geol
    • Journal of Korean Institute of Industrial Engineers
    • /
    • v.40 no.3
    • /
    • pp.257-266
    • /
    • 2014
  • The semiconductor manufacturing industry is managed by a number of parameters from the FAB which is the initial step of production to package test which is the final step of production. Various methods for prediction for the quality and yield are required to reduce the production costs caused by a complicated manufacturing process. In order to increase the accuracy of quality prediction, we have to extract the significant features from the large amount of data. In this study, we propose the method for extracting feature from the cell level data of probe test process using OPTICS which is one of the density-based clustering to improve the prediction accuracy of the quality of the assembled chips that will be placed in a package test. Two features extracted by using OPTICS are used as input variables of quality prediction model because of having position information of the cell defect. The package test progress for chips classified to the correct quality grade by performing the improved prediction method is expected to bring the effect of reducing production costs.

A Study on the/ Correlation Between Board Level Drop Test Experiment and Simulation

  • Kang, Tae-Min;Lee, Dae-Woong;Hwang, You-Kyung;Chung, Qwan-Ho;Yoo, Byun-Kwang
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.18 no.2
    • /
    • pp.35-41
    • /
    • 2011
  • Recently, board level solder joint reliability performance of IC packages during drop impact becomes a great concern to semiconductor and electronic product manufacturers. The handheld electronic products are prone to being dropped during their useful service life because of their size and weight. The IC packages are susceptible to solder joint failures, induced by a combination of printed circuit board (PCB) bending and mechanical shock during impact. The board level drop testing is an effective method to characterize the solder joint reliability performance of miniature handheld products. In this paper, applying the JEDEC (JESD22-B111) standard present a finite element modeling of the FBGA. The simulation results revealed that maximum stress was located at the outermost solder ball in the PCB or IC package side, which consisted well with the location of crack initiation observed in the failure analysis after drop reliability tests.

Effects of Fatigue Strength by Solder Ball Composition (솔더볼 조성에 의한 피로강도의 영향)

  • 김경수;김진영
    • Journal of the Korean Vacuum Society
    • /
    • v.13 no.3
    • /
    • pp.127-131
    • /
    • 2004
  • Package reliability test was conducted to investigate the effect of solder composition on the ball fatigue strength for BGA (Ball Grid Array) packaging. The test pieces are assembled using eutectic composition 63Sn/37Pb, 62Sn/36Pb/2Ag, and 63Sn/34.4Pb/2Ag/0.5Sb solder after pre-conditioning at MRT Lv 3 (Moisture Resistance Test Level) and then conducted under T/C (Temperature Cycle test). For each case, the ball shear strength was obtained and micro structure photos were taken. SEM (scanning electron microscope) and EDX (Energy Dispersive X-ray) were used to the analyze failure mechanism. The growth rate of Au-Sn intermetallic compound in Sn63Pb34.5Ag2Sb0.5 solder was slow when compared to 63Sn/37Pb solder and 62Sn/36Pb/2Ag solder. The degradation of shear strength of solder balls caused by solder composition was discussed.

Wafer Level Package Using Glass Cap and Wafer with Groove-Shaped Via (유리 기판과 패인 홈 모양의 홀을 갖는 웨이퍼를 이용한 웨이퍼 레벨 패키지)

  • Lee, Joo-Ho;Park, Hae-Seok;Shin, Jea-Sik;Kwon, Jong-Oh;Shin, Kwang-Jae;Song, In-Sang;Lee, Sang-Hun
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.56 no.12
    • /
    • pp.2217-2220
    • /
    • 2007
  • In this paper, we propose a new wafer level package (WLP) for the RF MEMS applications. The Film Bulk Acoustic Resonator (FBAR) are fabricated and hermetically packaged in a new wafer level packaging process. With the use of Au-Sn eutectic bonding method, we bonded glass cap and FBAR device wafer which has groove-shaped via formed in the backside. The device wafer includes a electrical bonding pad and groove-shaped via for connecting to the external bonding pad on the device wafer backside and a peripheral pad placed around the perimeter of the device for bonding the glass wafer and device wafer. The glass cap prevents the device from being exposed and ensures excellent mechanical and environmental protection. The frequency characteristics show that the change of bandwidth and frequency shift before and after bonding is less than 0.5 MHz. Two packaged devices, Tx and Rx filters, are attached to a printed circuit board, wire bonded, and encapsulated in plastic to form the duplexer. We have designed and built a low-cost, high performance, duplexer based on the FBARs and presented the results of performance and reliability test.