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A Prediction of Chip Quality using OPTICS (Ordering Points to Identify the Clustering Structure)-based Feature Extraction at the Cell Level

셀 레벨에서의 OPTICS 기반 특질 추출을 이용한 칩 품질 예측

  • Kim, Ki Hyun (School of Industrial Management Engineering, Korea University) ;
  • Baek, Jun Geol (School of Industrial Management Engineering, Korea University)
  • 김기현 (고려대학교 산업경영공학과) ;
  • 백준걸 (고려대학교 산업경영공학과)
  • Received : 2013.12.27
  • Accepted : 2014.03.12
  • Published : 2014.06.15

Abstract

The semiconductor manufacturing industry is managed by a number of parameters from the FAB which is the initial step of production to package test which is the final step of production. Various methods for prediction for the quality and yield are required to reduce the production costs caused by a complicated manufacturing process. In order to increase the accuracy of quality prediction, we have to extract the significant features from the large amount of data. In this study, we propose the method for extracting feature from the cell level data of probe test process using OPTICS which is one of the density-based clustering to improve the prediction accuracy of the quality of the assembled chips that will be placed in a package test. Two features extracted by using OPTICS are used as input variables of quality prediction model because of having position information of the cell defect. The package test progress for chips classified to the correct quality grade by performing the improved prediction method is expected to bring the effect of reducing production costs.

Keywords

References

  1. An, D.-W., Ko, H.-H., Baek, J.-G., and Kim, J.-Y. (2009), A Yield Prediction in the Semiconductor Manufacturing Process Using Stepwise Support Vector Machine, IE Interfaces, 22(3), 252-253.
  2. Ankerst, M., Breunig, M. M., Kriegel, H. P., and Sander, J. (1999), OPTICS : Ordering points to identify the clustering structure, ACM SIGMOD Record, 28(2), 49-60.
  3. Bae, K-J. (1995), Technology trend about large memory products test, the magazine of the IEEK, 22(12), 1420-1430.
  4. Baek, D.-H. and Nam, J.-G. (2002), Semiconductor yield improvement system using the data mining, IE interfaces, 2002 single issue, 293-300.
  5. Chien, C. F., Wang, W. C., and Cheng, J. C. (2007), Data mining for yield enhancement in semiconductor manufacturing and an empirical study, Expert Systems with Applications, 33(1), 192-198. https://doi.org/10.1016/j.eswa.2006.04.014
  6. Ester, M., Kriegel, H. P., Sander, J., and Xu, X. (1996), A density-based algorithm for discovering clusters in large spatial databases with noise, In KDD, 96, 226-231.
  7. Gardner, R. M., Bieker, J., and Elwell, S. (2000), Solving tough semiconductor manufacturing problems using data mining, In Advanced Semiconductor Manufacturing Conference and Workshop, 2000 IEEE/SEMI, 46-55.
  8. Hosmer, D. W. and Lemeshow (1989), Applied Logistic Regression, Wiley, New York.
  9. Hsieh, C. M., Hsu, L. L., and Ogura, S. (1995), U.S. Patent No. 5,466,625. Washington, DC : U.S. Patent and Trademark Office.
  10. Hsu, S. C. and Chien, C. F. (2007), Hybrid data mining approach for pattern extraction from wafer bin map to improve yield in semiconductor manufacturing, International Journal of Production Economics, 107(1), 88-103. https://doi.org/10.1016/j.ijpe.2006.05.015
  11. Kang, P., Kim, D., Lee, S-K., Doh, S., and Cho, S. (2012), Estimating the Reliability of Virtual Metrology Predictions in Semiconductor Manufacturing : A Novelty Detection-based Approach. Journal of the Korean Institute of Industrial Engineers, 38(1), 46-56. https://doi.org/10.7232/JKIIE.2012.38.1.046
  12. Kim, K., Hwang, C. G., and Lee, J. G. (1998), DRAM technology perspective for gigabit era. Electron Devices, IEEE Transactions on, 45(3), 598-608. https://doi.org/10.1109/16.661221
  13. Kumar, N., Kennedy, K., Gildersleeve, K., Abelson, R., Mastrangelo, C. M., and Montgomery, D. C. (2006), A review of yield modelling techniques for semiconductor manufacturing, International Journal of Production Research, 44(23), 5019-5036. https://doi.org/10.1080/00207540600596874
  14. Ludwig, L., Sapozhnikova, E., Lunin, V., and Rosenstiel, W. (2000), Error classification and yield prediction of chips in semiconductor industry applications, Neural Computing and Applications, 9(3), 202-210. https://doi.org/10.1007/s005210070013
  15. Nurani, R. K., Strojwas, A. J., Maly, W. P., Ouyang, C., Shindo, W., Akella, R, and Derrett, J. (1998), In-line yield prediction methodologies using patterned wafer inspection information. Semiconductor Manufacturing, IEEE Transactions on, 11(1), 40-47.
  16. Oh, Y., Part, H., Yoo, A., Kim, N., Kim, Y., Kim, D., Choi, J., Yoon, S., and Yang, H. (2013), A Product Quality Prediction Model Using Real-Time Process Monitoring in Manufacturing Supply Chain, Journal of the Korean Institute of Industrial Engineers, 39(4), 231-325.
  17. Park, H.-Y., Jun, C.-H., Hong, Y.-S., and Kim, S.-Y. (1995), Development of a new cluster index for semiconductor wafer defects and simulation-based yield prediction models, Journal of the Korean Institute of Industrial Engineers, 21(3), 371-385.
  18. Park, K.-W., Jun, C.-H., and Kim, S.-Y. (1997), The comparison and use of yield model in semiconductor manufacturing, IE interfaces, 10(1), 79-93.
  19. Pieter, P. B. (2000), 2000 begins with a revised industry roadmap, Solid State Technology, 31-44.
  20. Quinlan, J. R. (1986), Induction of decision trees, Machine learning, 1(1), 81-106.
  21. Quirk, M. and Serda, J. (2001), Semiconductor manufacturing technology, NJ, USA: Prentice Hall, 1.
  22. Sukegawa, S. and Saeki, T. (1995), U.S. Patent No. 5,422,850. Washington, DC : U.S. Patent and Trademark Office.
  23. Tan, C. M. and Lau, K. T. (2011), Automated wafer defect map generation for process yield improvement, In Integrated Circuits (ISIC), 2011 13th International Symposium on IEEE, 313-316.
  24. Tobin, K. W., Karnowski, T. P., and Lakhani, F. (2005), Technology considerations for future semiconductor data management systems, Semiconductor Fabtech, 12.
  25. Uzsoy, R., Lee, C. Y., and Martin-Vega, L. A. (1992), A review of production planning and scheduling models in the semiconductor industry part I : system characteristics, performance evaluation and production planning, IIE transactions, 24(4), 47-60. https://doi.org/10.1080/07408179208964233
  26. Vapnik, V. (2000), The nature of statistical learning theory, springer.
  27. Weiss, S. and Kulikowski, C. (1991), Computer systems that learn, Morgan Kaufmann Publishers.