• 전자공학회논문지S
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• 제34S권2호
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• pp.104-111
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• 1997

In this paper, three-phase PWM AC to DC boost converter that operates with unity power factor and sinusodial input line currents is presented. The current control of this converter is based on the space vector PWM strategy with fixed switching frequency and the line currents track to reference currents within one sampling time interval. By using this control strategy low ripples in the outut current and the voltage as well as fast dynamic response are achieved with small dc link cpacitance employed.

• 전기학회논문지
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• 제58권8호
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• pp.1544-1550
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• 2009

In this paper, a new single phase voltage sag/swell compensator using direct power conversion is proposed. A new compensator consists of input/output filter, series transformer and direct ac-ac converter, which is a single-phase back-to-back PWM converter without dc-link capacitors. Advantages of the proposed compensator include: simple power circuit by eliminating dc link electrolytic capacitors and thereby, improved reliability and increased life time of the entire compensator; simple PWM strategy or compensating voltage sag/swell at the same time and reduced switching losses in the ac-ac converter. Further, the proposed scheme is able to adopt simple switch commutation method without requiring complex four-step commutation method that is commonly employed in the direct power conversion. Simulation and experimental results are shown to demonstrate the advantages of the new compensator and PWM strategy. A 220V, 3kVA single-phase compensator based on the digital signal processor controller is built and tested.

• Journal of Power Electronics
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• 제19권6호
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• pp.1582-1590
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• 2019

A new method for reducing the common-mode current generated by the voltage variations in a two-inverter air conditioner system by applying a synchronized pulse-width modulation (PWM) strategy is proposed. The PWM signals of the master-mode inverter are generated based on the reference voltage, while those of the slave-mode inverter are output in the opposite direction when the master-mode inverter changes its switching state. However, the slave-mode control results in a mismatch between the reference voltage and the actual output voltage that is modified by synchronized control operation. The proposed method is capable of reducing and controlling this voltage error by performing signal selection in the vector space of the slave-mode inverter, which mitigates the distortion of the phase current. The efficacy of this method in reducing conducted emissions has been validated both theoretically and experimentally.

• Journal of Power Electronics
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• 제18권3호
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• pp.702-713
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• 2018

Power loss reduction and total harmonic distortion(THD) minimization are two important goals of improving three-level inverters. In this paper, an optimized pulse width modulation (PWM) strategy that can reduce switching losses and balance the neutral point with an optional THD of three-level neutral-point-clamped inverters is proposed. An analysis of the two-level discontinuous PWM (DPWM) strategy indicates that the optimal goal of the proposed PWM strategy is to reduce switching losses to a minimum without increasing the THD compared to that of traditional SVPWMs. Thus, the analysis of the two-level DPWM strategy is introduced. Through the rational allocation of the zero vector, only two-phase switching devices are active in each sector, and their switching losses can be reduced by one-third compared with those of traditional PWM strategies. A detailed analysis of the impact of small vectors, which correspond to different zero vectors, on the neutral-point potential is conducted, and a hysteresis control method is proposed to balance the neutral point. This method is simple, does not judge the direction of midpoint currents, and can adjust the switching times of devices and the fluctuation of the neutral-point potential by changing the hysteresis loop width. Simulation and experimental results prove the effectiveness and feasibility of the proposed strategy.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 하계학술대회 논문집 B
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• pp.721-723
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• 1993

A PWM switching control strategy based on instantaneous integration concept for reducing hamonic components of inverter system with fluctuating input voltage is presented. Applying this strategy to single phase full bridge PWM inverter through bipolor switching method and unipolor switching method, reduction of hamonic components of output voltage and current is demonstrated through simulation. The system operation is examined and confirmed by experiments.

• 전력전자학회논문지
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• 제20권4호
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• pp.356-362
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• 2015

This paper presents a current control strategy in the synchronous reference frame for a single-phase PWM converter, which ensures sinusoidal input current control under the distorted source voltage and frequency condition. Given that the distorted source voltage distorts the phase angle for PWM converter control, the input current contains the same harmonics as the source voltage. Aside from the distorted voltage, the variation in source frequency reduces the performance of input current control. To achieve sinusoidal input current control under the distorted source voltage and frequency condition, this paper proposes a compensation strategy of current reference with the distortion component extracted from the phase angle and a detection strategy of frequency variation from the output of a synchronous reference frame phase-lock loop. The experimental results confirm the validity of the proposed method under the distorted source voltage and frequency condition.

• 전력전자학회논문지
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• 제19권4호
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• pp.376-382
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• 2014

This paper proposes the pulse width modulation (PWM) control strategy for low-speed operation in the three-level neutral-point-clamped (NPC) inverters based on the bootstrap gate drive circuit. As a purpose of the cost reduction, several papers have paid attention to the bootstrap circuit applied to the three-level NPC inverter. However, the bootstrap gate driver IC cannot generate the gate signal to the IGBT for low-speed operation, because the bootstrap capacitor voltage decreases under the threshold level. For low-speed operation, the dipolar and partial-dipolar modulations can be the effective solution. However, these modulations have drawbacks in terms of the switching loss and THD. Therefore, this paper proposes the PWM control strategy to operate the inverter at low-speed and to minimize the switching loss and harmonics. The experimental results are presented to verify the validity on the proposed method.

• 전기학회논문지
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• 제62권11호
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• pp.1628-1632
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• 2013

HEP(Head Electric Power) system, supplying 3-phase service power to the coach vehicles, is a kind of special auxiliary power equipment which is boarded on 8200 series electric locomotives in KORAIL. This equipment shares high voltage DC link with a main propulsion converter/inverter systems. It was difficult to use high frequency PWM technique so that GTO has been used as a power device same like the main power system. Due to low PWM frequency(300Hz) of HEP inverter, the output voltage has less power quality comparing to normal SIV(Static Inverter) system. In this paper, an optimal PWM strategy is presented for new IGBT type HEP inverter system. Several PWM techniques were investigated to improve output voltage quality under fixed lower filter inductance and not high PWM frequency. Finally PC simulations have been done to clarify its availability.

• Journal of Power Electronics
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• 제14권6호
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• pp.1197-1207
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• 2014

Common-mode voltage (CMV) causes overvoltage stress to winding insulation and damages AC motors. CMV with high dv/dt causes leakage currents, which create noise problems for equipment installed near the converter. This study proposes a new pulse-width modulation (PWM) strategy for three-level T-type NPC inverters. This strategy substantially eliminates CMV. The principle for selecting suitable triangle carrier signals for the three-level T-type NPC is described. The proposed method can mitigate the peak value of CMV by 50% compared with the phase disposition pulse-width modulation method. Furthermore, the proposed method exhibits better harmonic spectrum and lower root mean square value for the CMV than those of the reduced-CMV method on the basis of the phase opposition disposition PWM scheme with modulation index higher than 0.5. The proposed modulation can easily be implemented using software without any additional hardware modifications. Both simulation and experimental results demonstrate that the proposed carrier phase-shift PWM method has good output waveform performance and reduces CMV.

• 대한전기학회논문지
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• 제38권11호
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• pp.896-904
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• 1989

PWM techniques which eliminate and reduce harmonics of output voltage in PWM Inverter driving System with fluctuating input volotage are described. First, harmonic factors are analyzed from harmonic equation of general PWM waveform and by examination of control possiblity of each factor, controllable factor is selected. Applying controllable factor to NPWM, PWM techniques using reference wave and carrier wave modulation are introduced. Actually, by the experiment applied with this strategy, the reduction of harmonics of output voltage is confirmed.