• Journal of Power Electronics
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• v.14 no.2
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• pp.217-225
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• 2014

This paper deals with the optimization of the driving techniques for the ZVT synchronous buck converter proposed in [1]. Two new gate drive circuits are proposed to allow this converter to operate by only one control signal as a 12V voltage regulator module (VRM). Voltage-driven method is applied for the synchronous rectifier. In addition, the control signal drives the main and auxiliary switches by one driving circuit. Both of the circuits are supplied by the input voltage. As a result, no supply voltage is required. This approach decreases both the complexity and cost in converter hardware implementation and is suitable for practical applications. In addition, the proposed SR driving scheme can also be used for many high frequency resonant converters and some high frequency discontinuous current mode PWM circuits. The ZVT synchronous buck converter with new gate drive circuits is analyzed and the presented experimental results confirm the theoretical analysis.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.431-435
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• 1998

This paper deals with the output characteristics of resonant PWM inverter type X-ray generators connected to different DC power units i.e. a single phase full bridge rectifier, a three phase full bridge rectifier and a power storage unit(PSU). The quality of X-ray beam depend on the pulsation waveforms of DC voltage supplied to the X-ray tulbe. In a X-ray generator, the waveforme of DC output voltage can be affected from hramonic distortion of DC input power. When a tube voltage waveform is distorded, the property of X-ray beam such as reproducibility, direcibility and doesage can be reduced. Therefore, we compared DC output waveforms and doesages with three thpe of DC power units and show the experimental results in this paper

• Journal of Power Electronics
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• v.12 no.5
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• pp.723-730
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• 2012

This paper presents a new ZVS single phase bridgeless (Power Factor Correction) PFC, using an active clamp to achieve zero-voltage-switching for all main switches and diodes. Since the presented PFC uses a bridgeless rectifier, most of the time, only two semiconductor components are in the main current path, instead of three in conventional single-switch configurations. This property significantly reduces the conduction losses,. Moreover, zero voltage switching removes switching loss of all main switches and diodes. Also, auxiliary switch turns on zero current condition. The presented converter needs just a simple non-isolated gate drive circuitry to drive all switches. The eight stages of each switching period and the design considerations and a control strategy are explained. Finally, the converter operation is verified by simulation and experimental results.

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1401-1403
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• 2005

This paper presents generalized small-signal models for asymmetrically-driven double-ended dc-to-dc converters. The proposed small-signal models include the effects of the parasitic resistances, which have dominant influence on the damping of the secondary power stage double-pole. To confirm the validity of new models, an asymmetrical half-bridge converter with center-taped rectifier and a forward-flyback converter with current doubler rectifier were built, and their performances were compared with the theoretical predictions.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2018-2030
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• 2015

A two stage ac drive configuration consisting of a single-phase line commutated rectifier and a three-phase voltage source inverter (VSI) is very common in low and medium power applications. The deterministic pulse width modulation (PWM) methods like sinusoidal PWM (SPWM) could not be considered as an ideal choice for modern drives since they result mechanical vibration and acoustic noise, and limit the application scope. This is due to the incapability of the deterministic PWM strategies in sprawling the harmonic power. The random PWM (RPWM) approaches could solve this issue by creating continuous harmonic profile instead of discrete clusters of dominant harmonics. Insufficient filtering at dc link results in the amplitude distortion of the input dc voltage to the VSI and has the most significant impact on the spectral errors (difference between theoretical and practical spectra). It is obvious that the sprawling effect of RPWM undoubtedly influenced by input fluctuation and the discrete harmonic clusters may reappear. The influence of dc link fluctuation on harmonics and their spreading effect in the VSI remains invalidated. A case study is done with four different filter capacitor values in this paper and results are compared with the constant dc input operation. This paper also proposes an ingenious RPWM, a ripple dosed sinusoidal reference-random carrier PWM (RDSRRCPWM), which has the innate capacity of suppressing the effect of input fluctuation in the output than the other modern PWM methods. MATLAB based simulation study reveals the fundamental component, total harmonic distortion (THD) and harmonic spread factor (HSF) for various modulation indices. The non-ideal dc link is managed well with the developed RDSRRCPWM applied to the VSI and tested in a proto type VSI using the field programmable gate array (FPGA).

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.5B no.4
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• pp.366-373
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• 2005

This paper presents two new circuit topologies of the dc busline side active resonant snubber assisted voltage source high frequency link soft switching PWM full-bridge dc-dc power converters acceptable for either utility ac 200V-rms or ac 400V-rms input grid. These high frequency switching dc-dc converters proposed in this paper are composed of a typical voltage source-fed full-bridge PWM inverter, high frequency transformer with center tap, high frequency diode rectifier with inductor input filter and dc busline side series switches with the aid of a dc busline parallel capacitive lossless snubber. All the active switches in the full-bridge arms as well as dc busline snubber can achieve ZCS turn-on and ZVS turn-off transition commutation with the aid of a transformer leakage inductive component and consequently the total switching power losses can be effectively reduced. So that, a high switching frequency operation of IGBTs in the voltage source full bridge inverter can be actually designed more than about 20 kHz. It is confirmed that the more the switching frequency of full-bridge soft switching inverter increases, the more soft switching PWM dc-dc converter with a high frequency transformer link has remarkable advantages for its power conversion efficiency and power density implementations as compared with the conventional hard switching PWM inverter type dc-dc power converter. The effectiveness of these new dc-dc power converter topologies can be proved to be more suitable for low voltage and large current dc-dc power supply as arc welding equipment from a practical point of view.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.6
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• pp.594-601
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• 2011

In this paper, a new current controller with the compensation of an unbalance and distorted grid voltages has been proposed. Generally, in the three-phase power system, single phase or nonlinear loads can be connected with the 3 phase linear load simultaneously on the same point of common coupling. Therefore, The source voltage unbalance and distortion problem can be occurred. Under these unbalance and distorted grid voltage conditions, the input current of 3 phase PWM rectifiers also have unbalance and distortion. In this paper, a current controller with the simple Model Reference Adaptive System based unbalance and distorted voltages observer is proposed to get a sinusoidal input current. The performance of the proposed algorithm is verified through the simulation and the experiment.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.385-387
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• 1996

A novel two stage soft-switching ac-to-dc convener with power factor correction is proposed. The proposed convener provides zero-voltage-switching (ZVS) condition to main switch of boost pre-regulator without auxiliary switch. Comparing to the conventional two stage approach(ZVS-PWM boost rectifier followed by off-line ZVS dc-dc step down converter), the proposed approach is simple and reducing EMI noise problem. A new simple DC-linked energy feedback circuit provides zero-voltage-switching condition to boost pre-regulator without imposing additional voltage and current stresses and loss of PWM capability. Operational principle, analysis, control of the proposed converter together with the simulation results of 1KW prototype are presented.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.9 no.5
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• pp.51-56
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• 1995

The transistors of single phase 3 level PWM Inverter compose output power transistors and neutral point clamping transistors, which are NPN transistors. Waveforms of driving signals for this are PWM waves for power transistors and period operating waves for neutral point clamping transistors, which signals made W-type modulation from rectangular and sine wave. The output power transistors operate at ON-time complementary and neutral point clamping transistors operate at OFF-time complementary respectively. Therefore, each transistors operate in half period at parallel. Characteristics of this inverter circuit is parallel switching method about series switching method of general inverter. As modulation of 3 level drive signals made from full-wave rectifier of sine wave and rectangular wave, which are level wave about 3 level of complementary transistor inverter. So, this circuit composed complementary operation inverter of NPN transistors only compare with PNP-NPN complementary inverter, which have high power 3 level inverter of complementary operation.

• Journal of IKEEE
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• v.10 no.2 s.19
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• pp.149-155
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• 2006

In this study, the design of low voltage DC-DC converter with low triggering ESD (Electro-Static Discharge) protection circuit was investigated. The purpose of this paper is design optimization for low voltage(2.5V to 5.5V input range) DC-DC converter using CMOS switch. In CMOS switch environment, a dominant loss component is not switching loss but conduction loss at 1.2MHz switching frequency. In this study a constant frequency PWM converter with synchronous rectifier is used. And zener Triggered SCR device to protect the ESD phenomenon was designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 8V.