• Title/Summary/Keyword: PWM inverter

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A Study on The Multi-PWM Inverter by Complementary Transistor (상보형(相補形) 트랜지스터에 의한 다중(多重) PWM 인버터에 관한 연구)

  • Chung, Yon-Tack;Lee, Jong-Soo;Bee, Sang-Jun;Back, Jong-Hyun
    • Proceedings of the KIEE Conference
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    • 1989.07a
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    • pp.515-517
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    • 1989
  • This PWM inverter are used bridge circuit of two pair complementary transistor at each phase. The operation signals are 3 level PWM wave of W type and M type modulation, Which were obtained from switching time data by switching position calculation of triangular and sine wave. The output voltage waveforms of this inverter have the 5 level phase voltage and the 9 level line voltage of PWM.

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A New Current Controlled PWM technique for NPC Inverter (NPC 인버터를 위한 새로운 전류제어 기법)

  • 이병송;김길동;변윤섭;한영재;박현주
    • Proceedings of the KIPE Conference
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    • 1998.07a
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    • pp.63-69
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    • 1998
  • A new current controlled PWM technique with NPC structure is proposed in this paper. A current controlled PWM technique with neutral-point-clamped pulse-width modulation inverter composed of main switching devices which operates as switch for PWM and auxiliary switching devices to clamp the output terminal potential to the neutral point potential is described. The proposed current controller has a first and second current band. The switching pattern will be made by the first current band. According to the second current band, the output state of the switching pattern is changed into positive and negative state. This inverter output contains less harmonic content and lower switching frequency than that of conventional current controlled PWM technique at the same current limit. Two inverters are compared analytically and the performance is investigated by the computer simulation.

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A study on digital signal method of PWM signal by switching position function (PWM 신호의 스위칭 함수에 의한 디지탈 방식에 관한 연구)

  • Chung, Y.T.;Lee, J.S.;Bae, S.J.;Baek, J.H.
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.148-150
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    • 1988
  • The output characteristics of VSI by transistor depend upon bias signal with drive circuit. As the CTI is one of the VSI, takes case PWM output voltage. This Inverter operation is based upon position and negative of sinusoldal PWM signal by carrier triangular wave and compared sine one. Besides, the Inverter operation system required digital signal for microprocessor, sampling method of Inverter driver signals study for get rid of generated signal is error. In the paper, the method of 3 level PWM signal for CTI was studied. This method of signals depend upon caculated switching position of natural sampling with $10^{-6}$ modulation error for time flowchart programs.

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The Simple Harmonic Analysis Method of the Multi-Carrier PWM Techniques by Using the Output Phase Voltage in the Multi-Level Inverter (출력 상전압을 이용한 멀티-캐리어 PWM 기법의 간단한 고조파 분석 방법)

  • 김준성;김태진;강대욱;현동석
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.52 no.7
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    • pp.352-360
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    • 2003
  • This paper deals with a simple method in order to analyze and compare the harmonic characteristics in the multi-level inverter. Generally, the magnitude of harmonic components becomes different according to the multi-carrier Pulse Width Modulation(PWM) techniques, the modulation index($M_i$) and the switching frequency The previous papers analyzed the harmonic characteristics from the viewpoint of the space voltage vector. Hence, the calculation of the harmonic vector becomes more difficult and complex in 4-level or over 5-level. However, the proposed method has reduced an amount of calculation and simplified the process of it, using the relationship between the reference voltage and the output phase voltage to the load neutral point. It is applied to the 5-level cascade inverter and the harmonic characteristics for each multi-carrier PWM technique are compared through the simulation.

Study on the Improvement of utility factor for output voltage on 3-phase PWM Inverter (3상 PWM인버어터 출력전압 이용률 개선에 관한 연구)

  • 박성준;변영복;김광태;권순재;김철우
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 1995.10a
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    • pp.101-104
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    • 1995
  • The linear control of DC Link voltage in PWM inverter is very importent to estimate the goodness of PWM method. In motor control system, for the maximum torque on full region operating, the whole of DC Link voltage region must be used. 3 phase sinusoidal PWM inverter has a low efficienty at the using of output voltage. according to make better the efficiency, new improved PWM control method is proposed. The results of experimentation and simulation are included to verify the validity of this method.

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A Study on the Reduction of Computation Time in Finite Element Analysis of Electric Machines Driven by PWM Inverters (PWM 인버터로 구동되는 전기기기의 유한요소 해석시 계산시간 저감방법에 관한 연구)

  • Jung, In-Soung;Hyun, Dong-Sack
    • Proceedings of the KIEE Conference
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    • 1999.07a
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    • pp.226-228
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    • 1999
  • This paper presents an efficient analysis method using time-stepping finite element method for electric machines driven by pulse width modulation (PWM) inverter. In the method, the value of time-step is changed according to the PWM logic of inverter, and the calculation time can be reduced while maintaining analysis accuracy. Using the method, the dynamic characteristics of a permanent magnet linear synchronous motor (PMLSM) driven by PWM inverter are analyzed.

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Loss Analysis and Comparison of Grid-connected Bidirectional Inverter with Different Types of PWM Schemes (PWM 방식에 따른 계통연계 양방향 인버터의 손실양상 비교 및 분석)

  • Heo, Sung-Jun;Ahn, Hyo-Min;Byun, Jong-Eun;Lee, Byoung-Kuk
    • The Transactions of the Korean Institute of Power Electronics
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    • v.22 no.6
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    • pp.547-550
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    • 2017
  • This paper presents a loss analysis and compares three pulse width modulation (PWM) methods applied in a three-phase grid-connected bidirectional inverter for an energy storage system. The losses in switching devices and output low pass filters are theoretically analyzed by using PWM control techniques. Grid-connected bidirectional inverters are designed by using PWM techniques, and the designed inverters are simulated to verify the analysis results.

Compensation Scheme for Dead Time and Inverter Nonlinearity Insensitive to IPMSM Parameter Variations (IPMSM 파라미터 변화에 영향 받지 않는 데드타임 및 인버터 비선형성 보상기법)

  • Park, Dong-Min;Kim, Kyeong-Hwa
    • The Transactions of the Korean Institute of Power Electronics
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    • v.17 no.3
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    • pp.213-221
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    • 2012
  • In a PWM inverter-fed IPMSM (Interior Permanent Magnet Synchronous Motor) drive, a dead time is inserted to prevent a breakdown of switching device caused by the short-circuit of DC link. This distorts the inverter output voltage resulting in a current distortion and torque ripple. In addition to the dead time, nonlinearity exists in switching devices of the PWM inverter, which is generally dependent on operating conditions such as the temperature, DC link voltage, and current. The voltage disturbance caused by the dead time and inverter nonlinearity directly influences on the inverter output performance, and it is known to be more severe at low speed. In this paper, a new compensation scheme for the dead time and inverter nonlinearity under the parameter variation is proposed for a PWM inverter-fed IPMSM drive. The overall system is implemented using DSP TMS320F28335 and the validity of the proposed algorithm is verified through the simulation and experiments.

A Three Phase Three-level PWM Switched Voltage Source Inverter with Zero Neutral Point Potential

  • Oh Won-Sik;Han Sang-Kyoo;Choi Seong-Wook;Moon Gun-Woo
    • Journal of Power Electronics
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    • v.5 no.3
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    • pp.224-232
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    • 2005
  • A new three phase three-level Pulse Width Modulation (PWM) Switched Voltage Source (SVS) inverter with zero neutral point potential is proposed. It consists of three single-phase inverter modules. Each module is composed of a switched voltage source and inverter switches. The major advantage is that the peak value of the phase output voltage is twice as high as that of a conventional neutral-point-clamped (NPC) PWM inverter. Thus, the proposed inverter is suitable for applications with low voltage sources such as batteries, fuel cells, or solar cells. Furthermore, three-level waveforms of the proposed inverter can be achieved without the switch voltage imbalance problem. Since the average neutral point potential of the proposed inverter is zero, a common ground between the input stage and the output stage is possible. Therefore, it can be applied to a transformer-less Power Conditioning System (PCS). The proposed inverter is verified by a PSpice simulation and experimental results based on a laboratory prototype.

Implementation of an FPGA-based Multi-Carrier PWM Techniques for Multilevel Inverter (FPGA기반 멀티레벨 인버터의 다중 반송신호 PWM 기법 구현)

  • Chun, Tae-Won;Lee, Hong-Hee;Kim, Heung-Geun;Nho, Eui-Cheol
    • The Transactions of the Korean Institute of Power Electronics
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    • v.15 no.4
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    • pp.288-295
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    • 2010
  • Multi-level inverters have drawn much of attention in recent years because it can meet the demand of high power applications and good power quality associated with reduced harmonic distortion. As the number of voltage level increases, field programmable gate arrays (FPGAs) are suitable for the implementation of multi-level modulation algorithm. This paper proposes the implementation method for generating PWM pulses at the three phase diode clamped five-level inverter using FPGA. The strategy for communicating stably the data of three-phase reference voltages between the DSP and FPGA is suggested. The techniques for generating PWM signals based on a multi-carrier modulation method are carried out through the experiments with 32-bit DSP and Cyclone-III FPGA.