• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.11
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• pp.21-30
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• 1998

In this paper, a digital current control system using a FPGA(Field Programmable Gate Array) was implemented, and the system was applied to an induction motor widely used as an industrial driving machine. The FPGA designed by VHDL(VHSIC Hardware Description Language) consists of a PWM(Pulse Width Modulation) generation block, a PWM protection block, a speed measuring block, a watch dog timer block, an interrupt control block, a decoder logic block, a wait control block and digital input and output blocks respectively. Dedicated clock inputs on the FPGA were used for high-speed execution, and an up-down counter and a latch block were designed in parallel, in order that the triangle wave could be operated at 40 MHz clock. When triangle wave is compared with many registers respectively, gate delay occurs from excessive fan-outs. To reduce the delay, two triangle wave registers were implemented in parallel. Amplitude and frequency of the triangle wave, and dead time of PWM could be changed by software. This FPGA was synthesized by pASIC 2SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to digital current control system for 3-phase induction motor. The digital current control system of the 3 phase induction motor was configured using the DSP(TMS320C31-40 MHz), FPGA, A/D converter and Hall CT etc., and experimental results showed the effectiveness of the digital current control system.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.225-227
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• 2008

This paper deals with the implementation on a Field Programmable Gate Array (FPGA) of PWM switching patterns for a voltage multilevel inverter. The reference data in main microcontroller is transmitted to the FPGA through 16 general purpose I/O ports. Herein, three-phase reference voltage signals are addressed by the last 2-bit (bit 15-14) and their data are assigned in remaining 14-bit, respectively. The carrier signals are created by 16-bit counter in up-down counting mode inside FPGA according to desirable topology. Each reference signal is compared with all carrier signals to generate corresponding PWM switching patterns for control of the multilevel inverter. Useful advantages of this scheme are easy implementation, simple software control and flexibility in adaptation to produce many PWM signals. Some simulations and experiments are carried out to validate the proposed method.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.652-654
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• 2016

This paper shows the Design and implementation of sinusoidal BLDC motor drive logic using SVPWM method with FPGA. Sinusoidal BLDC motor driver logic consists of sine-wave PWM generator, dead-time and lead angle control logic. PWM generator logic is designed using SVPWM method for increase of 15.5% linear domain than general sine-wave PWM. This logic is verified and implemented using Spartan-6 FPGA Board. Test results show that THD(Total Harmonic Distortion) of motor-driving current is 19.2% and rotor position resolution is 1.6 degree.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.11
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• pp.211-220
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• 2014

In this paper a full FPGA-based and compact motor-control system is shown that makes it easy to control the motor and analyze the result data in real time with embedding not only a DC motor controller but also a TFT LCD interface in a single FPGA. Both a PID speed control module for a DC motor and a monitoring module for plotting real time graphs on to a TFT LCD are designed in a single FPGA, and the system validity is shown through simulation and experimental results. The FPGA used is xc3s400 and the entire system is designed by using the AD (Altium Designer). A PWM motor drive system is constructed by using MOSFETs for a DC motor 4-quadrant operations.

• Journal of Institute of Control, Robotics and Systems
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• v.22 no.7
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• pp.513-518
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• 2016

The piezoelectric actuating device is known for its large power density and simple structure. It can generate a larger force than a conventional actuator and has also wide bandwidth with fast response in a compact size. To control the piezoelectric actuator, we need an analog signal conditioning circuit as well as digital microcontrollers. Conventional microcontrollers are not equipped with an analog part and need digital-to-analog converters, which makes the system bulky compared with the small size of piezoelectric devices. To overcome these weaknesses, we are developing a single-chip controller that can handle analog and digital signals simultaneously using mixed-signal FPGA technology. This gives more flexibility than traditional fixed-function microcontrollers, and the control speed can be increased greatly due to the parallel processing characteristics of the FPGA. In this paper, we developed a floating-point multiplier, PWM generator, 80-kHz power control loop, and 1-kHz position feedback control loop using a single mixed-signal FPGA. It takes only 50 ns for single floating-point multiplication. The PWM generator gives two outputs to control the charging and discharging of the high-voltage output capacitor. Through experimentation and simulation, it is demonstrated that the designed control loops work properly in a real environment.

• Journal of Institute of Control, Robotics and Systems
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• v.10 no.10
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• pp.922-929
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• 2004

In this paper, we develop control hardware such as an FPGA based general purposed intelligent controller with a DSP board to solve nonlinear system control problems. PID control algorithms are implemented in an FPGA and neural network control algorithms are implemented in a BSP board. An FPGA was programmed with VHDL to achieve high performance and flexibility. The additional hardware such as an encoder counter and a PWM generator can be implemented in a single FPGA device. As a result, the noise and power dissipation problems can be minimized and the cost effectiveness can be achieved. To show the performance of the developed controller, it was tested fur nonlinear systems such as a robot hand and an inverted pendulum.

• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.362-371
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• 2018

This work proposes FPGA implementation of Carrier Disposition PWM for closed loop seven level diode clamped multilevel inverter in speed control of induction motor. VLSI architecture for carrier Disposition have been introduced through which PWM signals are fed to the neutral point seven level diode clamped multilevel using which the speed of the induction motor is controlled. This proposed VLSI architecture makes the power circuit to work better with reduced stresses across the switches and a very low voltage and current total harmonic distortion (THD). The output voltages, currents, torque & speed characteristics for seven level neutral point diode clamped multilevel inverter for AC drive was studied. It has observed the proposed scheme introduces less distortion and harmonics. The results were validated using real time results.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.9
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• pp.124-129
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• 2009

Recently, PWM inverter is widely utilized for many industrial applications such as high performance drive and space vector pulse width modulation(SVPWM) inverter which has high voltage ratio and low harmonics compared to conventional PWM inverter. This paper presents the implementation on a field programmable gate array(FPGA) of a SVPWM module for a voltage source inverter. The SVPWM module consists of PWM generator, current and position sensor interface and dead time compensator. The implemented SVPWM module can be integrated with a digital signal processor(DSP) to provide a flexible and effective solution for high performance voltage source inverter and for the use of multi-motor control. The performance of SVPWM module is verified by simulation and several experimental results.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.575-580
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• 2003

In this paper, we develop a control hardware such as an FPGA based general purpose controller with a DSP board to solve nonlinear control problems. PID control algorithms are implemented in an FPGA and neural network control algorithms are implemented in a DSP board. PID controllers implemented on an FPGA was designed by using VHDL to achieve high performance and flexibility. By using high capacity of an FPGA, the additional hardware such as an encoder counter and a PWM generator, can be implemented in a single FPGA device. As a result, the noise and power dissipation problems can be minimized and the cost effectiveness can be achieved. In order to show the performance of the developed controller, it was tested for controlling nonlinear systems such as an inverted pendulum.

• Journal of the Korean Institute of Intelligent Systems
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• v.24 no.4
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• pp.412-417
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• 2014

This paper presents the development and control of an omni-directional holonomic mobile robot platform, which is equipped with three lateral orthogonal-wheel assemblies. Omni-directionality can be achieved with decoupled rotational and translational motions. Simulation studies on collision avoidance are conducted. A real robot is built and its hardware is implemented to control the robot. Control algorithm is embedded on DSP and FPGA chips. Hardware for motor control such as PWM, encoder counter, serial communication modules is implemented on an FPGA chip. Experimental studies of following joystick commands are performed to demonstrate the functionality and controllability of the robot.