• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2013년도 전력전자학술대회 논문집
• /
• pp.1-2
• /
• 2013

In this paper, we inject input currents having $3^{rd}$ harmonic to reduce the capacitance of DC link capacitors in single-phase converters. If the input current with third harmonic is injected, the required capacitance can be reduced by minimizing the difference between the input and output power. To control the input current, instead of PI control done in rotating frame, PR controller is used with the proposed separate current control method for fundamental and $3^{rd}$ harmonic components. The validity of the proposed method has been demonstrated by simulation results.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1997년도 하계학술대회 논문집 F
• /
• pp.2204-2206
• /
• 1997

A novel zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter with a low output current ripple is proposed. The proposed circuit improve the demerits of the previously presented ZVBCS-FB-PWM converters[5-8] such as use of lossy components or additional active switches. A simple auxiliary circuit which includes neither lossy components nor active switches provides ZVZCS conditions to primary switches, ZVS for leading-leg switches and ZCS for lagging-leg switches. In addition, this proposed circuit reduces a output current ripple considerably. Many advantages including simple circuit topology, high efficiency, low cost and low current ripple make the new converter attractive far high power (> 1kW) applications.

• 조명전기설비학회논문지
• /
• 제21권3호
• /
• pp.44-49
• /
• 2007

본 논문은 기존 컨버터에 보조 스위치와 공진 인덕터, 공진 커패시터, 두개의 다이오드를 추가하여 새로운 소프트 스위칭 액티브 스너버회로가 부가된 컨버터를 제안하였다. 제안한 컨버터는 공진 에너지 회생율을 최대화함으로써 전체적인 효율을 증가시켰으며, 모든 스위칭 소자들이 소프트 스위칭 조건에서 턴-온/턴-오프하여 스위칭 손실을 최소화하였다. 그리고 공진 에너지를 완전히 입력으로 회생시켜 전도손실을 저감시켰다. 이러한 결과는 시뮬레이션과 실험을 통하여 증명하였다.

• 한국산업융합학회 논문집
• /
• 제20권2호
• /
• pp.115-124
• /
• 2017

This paper aims to develop an SMPS topology for handling a high range of input voltages based on a DC-DC flyback converter circuit. For this purpose, 2 capacitors of the same specifications were serially connected on the input terminal side, with a flyback converter of the same circuit configuration serially connected to each of them, so as to achieve high input voltage and an effect of dividing input voltage. The serially connected flyback converters have the transformer turn ratio of 1:1, so that each coil is used for the winding of a single transformer, which is a characteristic of doubly-fed configuration and enables the correction of input capacitor voltage imbalance. In addition, a pulse transformer was designed and fabricated in a way that can achieve the isolation and noise robustness of the PWM output signal of the PWM controller that applies gate voltage to individual flyback converter switches. PSIM simulation was carried out to verify such a structure and confirm its feasibility, and a 100W class stack was fabricated and used to verify the feasibility of the proposed high voltage SMPS topology.

• 조명전기설비학회논문지
• /
• 제23권12호
• /
• pp.136-145
• /
• 2009

고속 철도 추진시스템의 고속화 및 급전시스템의 전력 품질향상을 위한 연구가 현재 활발히 진행되고 있으며 이를 위한 멀티레벨 전력변환기를 적용한 고속전철 추진시스템의 연구가 필요하다. 본 논문은 멀티레벨 전력변환기의 제어기법 및 공간전압벡터 변조기법(Space Vector PWM, SVPWM)의 모델을 제안한다. 단상 컨버터 제어방식으로는 널리 사용되고 있는 순시치 전류제어 방식을 대신하여, 과도상태 개선 및 제어 속응성을 향상시키기 위하여 동기좌표계에서의 전류 제어 방식을 사용한 제어기법을 적용하였으며, 단상 멜티레벨 컨버터 및 3레벨 인버터에 적용되는 SVPWM기법의 시뮬레이션 모델을 제안하고 인버터 축소모델을 통하여 모델링의 타당성을 보인다.

• Journal of Power Electronics
• /
• 제13권2호
• /
• pp.296-303
• /
• 2013

This paper proposes a high efficiency three-phase cascaded phase shifted H-bridge multi-level inverter without DC/DC converters for grid-tied multi string photovoltaic (PV) applications. The cascaded H-bridge topology is suitable for PV applications since each PV module can act as a separate DC source for each cascaded H-bridge module. The proposed phase shifted H-bridge multi-level topology offers advantages such as operation at a lower switching frequency and a lower current ripple when compared to conventional two level topologies. It is also shown that low ripple sinusoidal current waveforms are generated with a unity power factor. The control algorithm permits the independent control of each DC link voltage with a maximum power point for each string of PV modules. The use of the controller area network (CAN) communication protocol for H-bridge multi-level inverters, along with localized PWM generation and PV voltage regulation are implemented. It is also shown that the expansion and modularization capabilities of the H-bridge modules are improved since the individual inverter modules operate more independently. The proposed topology is implemented for a three phase 240kW multi-level PV power conditioning system (PCS) which has 40kW H-bridge modules. The experimental results show that the proposed topology has good performance.

• 한국산업정보학회논문지
• /
• 제20권1호
• /
• pp.1-7
• /
• 2015

In this paper, a 12-bit high resolution, power and area efficiency hybrid digital pulse width modulator (DPWM) with process and temperature (PT) calibration has been proposed for digital controlled DC-DC converters. The hybrid structure of DPWM combines a 6-bit differential tapped delay line ring-mux digital-to-time converter (DTC) schema and a 6-bit counter-comparator DTC schema, resulting in a power and area saving solution. Furthermore, since the 6-bit differential delay line ring oscillator serves as the clock to the high 6-bit counter-comparator DTC, a high frequency clock is eliminated, and the power is significantly saved. In order to have a simple delay cell and flexible delay time controllability, a voltage controlled inverter is adopted to build the deferential delay cell, which allows fine-tuning of the delay time. The PT calibration circuit is composed of process and temperature monitors, two 2-bit flash ADCs and a lookup table. The monitor circuits sense the PT (Process and Temperature) variations, and the flash ADC converts the data into a digital code. The complete circuits design has been verified under different corners of CMOS 0.18um process technology node.

• 전력전자학회논문지
• /
• 제4권2호
• /
• pp.175-183
• /
• 1999

PWM 컨버터에서 직류출력전압의 빠른 응답을 위해 입력 및 출력의 전력평형개념을 시스템 모델링에 도입하는 것이 바람직하다. 이 경우 시스템은 비선형이 되며 제어기 설계가 용이하지 않다. 본 논문에서는 입출력 궤환선형화 기법을 응용하여 시스템의 비선형성을 제거하였으며 그 결과 빠른 전압응답특성을 얻을 수 있었다. 또한 작은 용량의 전해커패시터를 사용하더라도 부하변동에 대해 직류출력전압을 일정하게 유지하는 것이 가능함을 보였다.

• 전자공학회논문지B
• /
• 제33B권10호
• /
• pp.148-156
• /
• 1996

Increasing the switching frquency is essential to achieve the high density of switched mode power supplies, but this leads to the increase of switching losses. A number of new soft switching converters have been presented ot reduce switching losses, but most of them may have some demerits, such as the increase of voltage/current stresses and high conduction losses. To overcome these problems, the ZVT-PWM converter has recently been presented. in this paper, the operation characteristics of the ZVT-PWM boost converter is analyzed, and the steady-states (DC) and small-signal model of this converter are derived and analyzed, and then the transfer functions of this converter are derived. The transfer functions of ZVT-PWM boost converter are similar to those of the conventional PWM boost converter, but the transfer characteristics are affecsted by te duty ratio and the switching frequency.

• 조명전기설비학회논문지
• /
• 제24권1호
• /
• pp.152-159
• /
• 2010

오늘날 산업이 발달함에 따라 산업현장에서는 높은 전력밀도와 전력변환 효율을 가진 전력변환장치를 요구하는 분야가 많아졌다. 현재 개발 중인 차세대 고속철도 역시 이러한 분야 중 하나로서 고효율 및 고성능 그리고 고밀도의 전력변환 장치가 필요하다. 본 논문에서는 차세대 고속철도에 사용 될 배터리 충전장치의 새로운 제어방식을 제안한다. 배터리 충전장치용 위상천이(PB;Phase shift) FB(Full-bridge) ZVZCS 컨버터는 크게 1차 측 보조회로를 갖는 방식과 2차 측 보조회로를 가지는 방식으로 분류할 수 있다. 전역통과필터를 사용한 PWM 스위칭기법은 2차 측에 공진회로를 갖는 ZVZCS 컨버터를 제어하기 위하여 제안되었다. 디지털 전역통과필터는 기존의 위상지연 IC 대신에 ATmega_128 마이크로컨트롤러에 의한 제어를 하였다. 제안된 토폴로지를 확인하기 위해 PSIM 소프트웨어를 사용하여 시뮬레이션하였고 1[kW] 축소모델을 제작하여 실험하였다.