• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.10
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• pp.1147-1158
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• 2008

In this paper, we designed a phase-looking circuit that locks the 16.8 GHz VTDRO to a 700 MHz SAW oscillator using SPD as a phase detector Direct phase locking with loop filter alone causes the problem of lock time, so VTDRO is phase leered by loop filter with the aid of time varying square wave current generator. The current generator is related to the loop filter and needs the systematic toning. In this paper, a systematic design of the current generator and loop filter is presented. The fabricated PLDRO shows a stabilized frequency of 16.8 GHz, a output power 6.3 dBm, and a phase noise of -101 dBc/Hz at the 100 kHz offset.

• Journal of Navigation and Port Research
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• v.30 no.10 s.116
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• pp.847-853
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• 2006

In this paper, we designed VCO(voltage controlled oscillator} that is composed of a dielectric resonator and a varactor diode, and the PLDRO(phase locked dielectric resonator oscillator) that is combined with the sampling phase detector and loop filter. The results at 12.05 GHz show the output power is 13.54 dBm frequency tuning range approximately +/- 7.5 MHz, and power variation over the tuning range less than 0.2 dB, respectively. The phase noise which effects on bits error rate in digital communication is obtained with -114.5 dBc/Hz at 100 kHz offset from carrier, and The second harmonic suppression is less than -41.49 dBc. These measured results are found to be more improved than those of VCO without adopting PLL, and the phase noise and power variation performance characteristics show the better performances than those of conventional PLL.

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.3
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• pp.427-432
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• 2017

This study describes the design and implementation of SHF band Downconverter Digital Satellite Communication. The SHF band Downconverter unit consists of PLDRO and Frequency converter. In Frequency converter, microstrip BPF and LPF designed through the pre EM simulation are implemented to minimize the unwanted spurious in Frequency converter. Through the pre-simulation analysis of space environment, the possibility of and minimized about the malfunction of equipment and we designed a reliable SHF band Downconverter through simulation for a TID according to the vibration generated during the launch and space radiation environment, and compared pre-simulation of main performance results to test results about main performances of SHF band Downconverter after production.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.11B
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• pp.1858-1863
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• 2000

본 논문에서는 SPD(Sampling Phase Detector)를 이용한 위상고정 방법의 무선 CATV용 위상 고정 유전체 공진 발진기(PLDRO)를 설계·제작하였다. 이 발진기는 하이브리드 형태인 12.875 GHz의 VCDRO(Voltage Controlled Dielectric Resonator Oscillator)와 완충 증폭기, 방향성 결합기, 주파수 체배기, 샘플링 위상 검출기, 루프 필터, 기준 주파수 발진기, VHF 증폭기로 구성되어 있다. 위상 고정 유전체 공진 발진기의 발진출력은 25.75 GHz에서 1.17 dBm, 기본주파수 억압 -27.83 dBc로 안정된 위상고정 상태를 나타내었다. 이때의 위상잡음은 -101.7 dBc/Hz @ 100KHz로 측정되었다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.6
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• pp.816-824
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• 1999

Design and performance of 18 GHz phase locked dielectric resonator oscillator(PLDRO) for Point-to-point radio link using analog phase locked loop is described which achieve high stability and low SSB phase noise. The module consists of an 18 GHz voltage controlled dielectric resonator oscillator(VCDRO), buffered amplifier, analog phase detector which are integrated to form a miniature hybrid circuit. In addition, containing a low phase noise VHF PLL has been designed to lock any other conventional N times frequency of crystal oscillator. The module achieves stable phase locked state, exhibits output power of 21 dBm at 18.00 GHz, -34 dBc harmonic suppression and -75 dBc/Hz phase noise at 10 kHz offset frequency from carrier.

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.2
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• pp.261-266
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• 2017

This study describes the design and implementation of SHF band Upconverter Digital Satellite Communication. The SHF band Upconverter unit consists of PLDROand frequency converter. In frequency converter, microstripBPF and LPF designed through the pre EMsimulation are implemented to minimize the unwanted spurious in frequency converter. Through the pre-simulation analysis ofspace environment, the possibility of and minimized about the malfunction of equipment and we designed a reliable SHF band Upconverter through simulation for a TID according to the vibration generated during the launch and space radiation environment, and compared pre-simulation of main performance results to test results about main performances of SHF band Upconverter after production.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.4 no.2 s.7
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• pp.81-87
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• 2005

In this paper, a VCDRO(Voltage Control Dielectirc Resonator Oscillator) for signal source of doppler radar system is designed and fabricated. The proposed VCDRO is made with new tuning mechanism using CPW line. The coplanar waveguide of $\lambda_{g}$/2 in length with varactor diode is placed on the metallization side under the dielectric resonator and coupled to it. Tuning varactor diode is mounted at one end of the CPW. The proposed circuit tuned by a CPW allows one more varactor diode to be mounted on the optimized CPW, where a greater sensitivity of frequency tuning is needed. With varying the biasing voltage for the varactor diode from 0 V to 15 V, output frequency tuning of 12 MHz is obtained. The PLDRO exhibits output power of 16.5 dBm with phase noise in the phase locked state characteristic of -115 dBc/Hz at 100 Hz, -105 dBc/Hz at the 10 kHz, and -102 dBc/Hz at 1 Hz offset from 10.525 GHz , respectively.