• 한국컴퓨터정보학회논문지
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• 제28권12호
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• pp.231-238
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• 2023

부스트 PFC (Power Factor Correction)컨버터는 AC 입력 전류의 단일 역률과 낮은 THD (Total Harmonic Distortion)를 달성하기 위해 다양한 제어기법들이 연구되고 있다. 그중 인덕터 전류의 평균값을 전류지령에 추종하도록 제어하는 평균전류 모드 제어가 있으며 가장 널리 사용되고 있다. 하지만, 오늘날 디지털 프로세서의 발달로 고도화된 디지털 제어가 가능해지면서 부스트 PFC 컨버터의 예측제어가 관심을 받고 있다. 예측제어에는 예측 알고리즘으로 듀티를 미리 생성하는 예측전류 모드 제어 및 모델을 기반으로 한 비용함수를 선정하여 스위칭 동작을 하는 모델예측제어로 분류된다. 따라서 본 논문에서는 부스트 PFC 컨버터의 평균전류 모드 제어, 예측전류 모드 제어, 모델예측 전류 제어를 간단히 설명한다. 또한, 시뮬레이션을 통해 전체 부하 및 다양한 외란 조건에서의 전류 제어를 비교 분석한다.

• 전력전자학회논문지
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• 제22권6호
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• pp.527-534
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• 2017

This paper proposes a new DC link voltage controller for a single-phase power factor correction (PFC) boost converter. The load current of the PFC boost converter affects the capacitor current, whereas the load current changes the output voltage. However, previous works that compensate output current have failed to consider the relationship between load current and duty. Thus, they also fail to maintain a constant output voltage if the load fluctuates under the conditions of a non-rated input voltage. By considering the duty in the load current compensation, the proposed method improves the load transient response regardless of the input voltage. To demonstrate its effectiveness, the proposed method is compared with other control methods by conducting PSM simulations and experiments under a rapidly changing load.

• 한국컴퓨터정보학회논문지
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• 제29권6호
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• pp.143-151
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• 2024

본 논문은 부스트 PFC (Power Factor Correction) 컨버터의 경부하시, 컨버터의 인덕터 전류 왜곡을 수학적으로 분석하고 원인을 정의한다. 경부하시 평균 전류 모드제어에서 인덕터 전류가 불연속적으로 도통하게 되어 부정확한 인덕터 전류 평균값이 전류 제어에 반영된다. 예측 전류 모드제어에서는 인덕터 전류에 비해 전류 리플이 상대적으로 커져 전류 왜곡이 심해진다. 또한 모델 예측 전류제어의 경우 인덕터 전류의 첨두치 부근에서 스위치가 OFF된다. 인덕터 전류 왜곡은 total harmonic distortion 증가와 역률 감소를 유발하기 때문에 반드시 해결되어야 한다. 본 논문은 수학적 분석을 기반으로 부스트 PFC 컨버터의 경부하시 전류 왜곡을 완화할 수 있는 설계 절차를 선정한다. 마지막으로 hardware-in-the-loop simulation을 사용하여 경부하시 제어 방법들을 비교분석했다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2012년도 전력전자학술대회 논문집
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• pp.195-196
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• 2012

In recent years, in an effort to improve the efficiency and the power density of the front-end power factor correction(PFC), the interleaving of multiple converter is employed. The conventional interleaved continuous conduction mode(CCM) boost PFC converter requires input and output voltage sensing and three current sensing to obtain current balancing between modules. In this paper, the interleaved CCM PFC converter based on modulated carrier control is proposed. With the proposed method, two phase interleaved PFC can be realized simply without line voltage sensing resistor and can achieve current balancing without additional current sensing resistor on common return path. The simulation studies are carried out to verify the effectiveness of the proposed control scheme.

• Journal of Power Electronics
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• 제4권1호
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• pp.18-27
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• 2004

The output storage capacitor of the PFC converters is commonly designed for the selected hold-up time or the allowed output ripple voltage percentage. Nevertheless, this output capacitor is a main contribution factor to the PFC system stability. Moreover, seeking for a minimum output storage capacitor that assures the PFC desired operation under all condition, and providing the advantage of a small size and low cost is the main interesting target for engineering. Therefore, in this issue the design steps of the PFC converter have been discussed depending on three choices, output ripple, hold-up time, and stability. It is cleared that any design must take the minimum required storage capacitor for stability prospective as step-l in deign, then apply for any other specification like hold-up time or ripple percentage.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2009년도 제40회 하계학술대회
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• pp.961_962
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• 2009

A novel, two-inductor, interleaved power-factor-corrected (PFC) boost converter that exhibits voltage-doubler characteristic when it operates with a duty cycle greater than 0.5 is introduced. The voltage-doubler characteristic of the proposed converter makes it quite suitable for universal-line (90~265VRMS) PFC applications. Because the proposed PFC boost rectifier operates as a voltage doubler at low line, its low-line range efficiency is greatly improved compared to that of its conventional counterpart. The performance of the proposed PFC rectifier was evaluated on an experimental 300W PFC prototype.

• Journal of Power Electronics
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• 제14권5호
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• pp.815-826
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• 2014

An improved bridgeless interleaved boost power factor correction (PFC) rectifier to improve power efficiency and component utilization is proposed in this study. With combined conventional bridgeless PFC circuit and interleaved technology, the proposed rectifier consists of two interleaved and magnetic inter-coupling boost bridgeless converter cells. Each cell operates alternatively in the critical conduction mode, which can achieve the soft-switching characteristics of the switches and increase power capacity. Auxiliary blocking diodes are employed to eliminate undesired circulating loops and reduce current-sensing noise, which are among the serious drawbacks of a dual-boost PFC rectifier. Magnetic component utilization is improved by symmetrically coupling two inductors on a unique core, which can achieve independence from each other based on the auxiliary diodes. Through the interleaved approach, each switch can operate in the whole line cycle. A simple control scheme is employed in the circuit by using a conventional interleaved controller. The operation principle and theoretical analysis of the converter are presented. A 600 W experimental prototype is built to verify the theoretical analysis and feasibility of the proposed rectifier. System efficiency reaches 97.3% with low total harmonic distortion at full load.

• 전력전자학회논문지
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• 제26권1호
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• pp.53-58
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• 2021

Operation of the interleaved Boost PFC converter in Critical Conduction Mode (CrM) shows the advantages of high efficiency and good EMI characteristics owing to the valley switching of FET. However, when it is designed for a highly pulsating load, operation at a relatively high frequency is inevitable at non-pulsating typical load condition, resulting in efficiency degradation. Moreover, the physical size of the inductor becomes problematic because of the nature of the CrM operation, where the inductor peak current is about two times the inductor average current, thereby requiring high DC-bias characteristics, which is worse when the output power is high. In this study, a new parallel driving method of two sets of interleaved boost PFC converters for highly pulsating high-power application is proposed. The proposed method does not require any additional load-sharing controller, resulting in high efficiency and smaller inductor size.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 전력전자학술대회 논문집
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• pp.401-404
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• 1998

This paper proposes a new soft switching single stage AC/DC full bridge converter with unit power factor and isolated output. This circuit shows that it is possible to combine the boost converter which is for PFC(Power Factor Correction) and full bridge converter which is for DC/DC converter. A simple auxiliary circuit which includes neither lossy components nor active switches eliminates ringing of secondary side of the transformer. The characteristics of the proposed circuit are investigated and the validity is verified by the simulation results.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.160-163
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• 2004

A passive lossless turn-on/turn-off snubber network is proposed for the boost PWM converter. Previous AC/DC PFC Boost Converter perceives feed forward signal of output for average current-mode control. Previous Boost Convertor, the Quantity of input current will be decreased by the decrease of output current in light load, and also Power factor comes to be decreased. Also the efficiency of converter will be decreased by the decrease of power factor. The proposed converter presents the good PFC, low line current harmonic distortions and tight output voltage regulations using energy recovery circuit. All of the semiconductor devices in the converter are turned on under exact or near zero voltage switching(ZVS). No additional voltage and current stresses on the main switch and main diode occur. To show the superiority of this converter is verified through the experiment with a 640W, 100kHz prototype converter.