• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.1
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• pp.65-71
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• 2015

This paper presents the efficiency analysis of a critical current mode interleaved PFC rectifier, in which each of three different semiconductor switches is employed as the active switch. The Si FET, SiC FET, and GaN FET are consecutively used with the prototype PFC rectifier, and the efficiency of the PFC rectifier with each different semiconductor switch is analyzed. An equivalent circuit model of the PFC rectifier, which incorporates all the internal losses of the PFC rectifier, is developed. The rms values of the current waveforms main circuit components are calculated. By adapting the rms current waveforms to the equivalent model, all the losses are broken down and individually analyzed to assess the conduction loss, switching loss, and magnetic loss in the PFC rectifier. This study revealed that the GaN FET offers the highest overall efficiency with the least loss among the three switching devices. The GaN FET yields 96% efficiency at 90 V input and 97.6% efficiency at 240 V, under full load condition. This paper also confirmed that the efficiency of the three switching devices largely depends on the turn-on resistance and parasitic capacitance of the respective switching devices.

• Journal of Korea Society of Industrial Information Systems
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• v.21 no.4
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• pp.21-30
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• 2016

In a single-phase power factor correction (PFC), the standard cascaded control algorithm using a proportional-integral-derivative (PID) controller has two main drawbacks: an inability to track sinusoidal current reference and low harmonic compensation capability. These drawbacks cause poor power factor and high harmonics in grid current. To improve these drawbacks, this paper uses a proportional-integral-derivative-resonant (PIDR) controller which combines a type-III PID with proportional-resonant (PR) controllers in the PFC. Based on a small signal model of the PFC, the type-III PID controller was implemented taking into account the bandwidth and phase margin of the PFC system. To adopt the PR controllers, the spectrum of inductor current of the PFC was analyzed in frequency domain. The hybrid PIDR controller were simulated using PSCAD/EMTDC and implemented on a 3 kW PFC prototype hardware. The performance results of the hybrid PIDR controller were compared with those of an individual type-III PID controller. Both controllers were implemented successfully in the single-phase PFC. The total harmonic distortion of the proposed controller were much better than those of the individual type-III PID controller.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.6
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• pp.561-568
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• 2011

This paper describes the operation characteristic of a single-phase PFC converter with 1-switch voltage doubler strategy for single-phase double-conversion UPS. A single-phase PFC converter with 1-switch voltage doubler strategy needs a diode bridge and one bidirectional active switch. Thus it is possible to reduce the material cost. However, the study results of operation characteristic and controller design has not been known after the converter circuit was proposed. For the performance evaluation of PFC converter, single-phase 3kVA double-conversion UPS was tested. The performance of PFC converter is experimentally confirmed with followings - input current reference traking, input power factor correction.

• Journal of Industrial Technology
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• v.31 no.B
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• pp.75-79
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• 2011

In this paper a new PFC Controller for 3-Phase Modular UPS(Uninterruptible Power Supplies) is proposed. The PFC circuit for 3-Phase Modular UPS is implemented using three 1-phase 3-level boost PFC circuits. To control DC output voltage, single voltage controller considering imbalance of two capacitor voltages and to regulate AC input current three independent current controllers are used in proposed PFC controller. By the proposed method, without additional hardware, THD(Total Harmonic Distortion) of input currents can be readily limited below 5% which is the harmonic current requirements by IEEE std. 519. Its validity is verified by simulations and experiments.

• Proceedings of the KIEE Conference
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• 2002.11d
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• pp.191-193
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• 2002

최근, 전기품질에 관한 중요성과 EMI에 의한 규정이 강화되면서 PFC 컨버터에 관한 연구가 많이 이루어지고 있다. 본 연구에서는 matlab을 활용하여 3상 PFC 컨버터를 효율적으로 시뮬레이션하는 연구를 수행한다. 단위역률을 위한 3상 컨버터 PFC 제어는 링크전압제어부, 전류제어부, SVPWM 제어부로 구성된다. 3상 PFC 컨버터를 matlab/simulink로 구성하여 시뮬레이션을 수행한 결과. 상전압과 상전류의 위상이 일치하여 단위역률이 잘 실현됨을 나타내고 있다. 본 연구는 PFC 컨버터의 설계 및 유사회로의 시뮬레이션에 유용하게 활용될 것이다.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.4
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• pp.248-253
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• 2014

Generally, power factor correction (PFC) techniques play an important role in the power supply technology. Many new circuit topologies and control strategies for PFC have been proposed. Among them, the brideless PFC (BPFC) reduces the number of switching devices and the losses and improves the power density as well. Moreover, by implementing the improved topology in the discontinous conduction mode (DCM) it ensures almost unity power factor in a simple and effective manner. In the DCM operation gives additional advantages such as zero-current turn-on in the power switches, zero-current turn-off in the output diode and reduces the complexity of the control circuitry. In this paper, a new control strategy for the BPFC is proposed. Also, the performance of the proposed system is demonstrated through experiments.

• Proceedings of the KIEE Conference
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• 2005.04a
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• pp.172-175
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• 2005

Recently international regulations governing the amount of harmonic currents(e.g IEC 61000-3-2) became mandatory and active Power factor correction (PFC) pre-regulator circuit became inevitable for the AC/DC converters. Among these topologies, the boost topology represents an optimum solution for a PFC pre-regulation in a high power application. This paper propose improved ZVT(Zero Voltage Transition) AC/DC PFC Boost using the average current control employing a soft-switching technique of the auxiliary switch with a minimum number of components. The conventional ZVT PFC Boost Converter has a disadvantage that the auxiliary switch turns off hard, which influences the overall efficiency and the EMI problem. In this paper, an improved ZVT PFC Boost converter using active snubber is proposed to minimize the switching loss of the auxiliary. The prototype of 100kHz, 640W system was implemented to show the improved performance.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1077-1078
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• 2007

본 논문은 고출력 MHL(Metal Halide Lamp) 전자식 안정기에 적합한 새로운 형태의 수동 PFC 회로를 제안하였다. 제안한 수동 PFC 회로는 저단가로 구현할 수 있으며 수동 소자의 사용으로 인해 신뢰성을 향상시켰다. 또한 기존의 수동 PFC 회로보다 입력 전류의 THD 및 역률을 개선하였다. 제안된 수동 PFC 회로에 사용된 소자값의 결정 방법을 수식적으로 제시하였으며 P-spice를 이용한 컴퓨터 시뮬레이션 및 1000W MHL 전자식 안정기에 실제 적용한 실험을 통하여 제안된 수동 PFC의 성능을 증명하였다.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.281-282
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• 2013

본 논문에서는 강압응용에 적합한 단일단 단일스위치 PFC를 제안한다. 제안하는 PFC는 스위치가 ZCS턴온하고 작은 전류로 턴오프하며, 다이오드는 ZCS턴오프한다. 또한 CCM에서 동작하므로 스위치 전류스트레스와 EMI가 작을 뿐 아니라 비교적 큰 용량(>500W)에도 적용이 가능하다. 제안하는 PFC의 동작원리를 제시하고 실험을 통하여 타당성을 검증하였다.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.185-186
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• 2015

본 논문에서는 임계 도통 모드 boost PFC의 입력 필터 효과를 보상하기 위한 온-타임 변경 기법에 대하여 제안한다. 임계 도통 모드 boost PFC의 입력 필터는 총 입력전류의 위상을 진상으로 만들게 되며, 이 영향은 성능의 하락을 초래하게 된다. 본 논문에서는 디지털 boost PFC의 진상 전류를 보상하기 위한 온-타임 변경 profile을 제시하였다. 제안된 방법의 효과는 90-230Vrms 입력, 200W 출력의 prototype 의 실험을 통하여 검증되었다.