• 제목/요약/키워드: PFC(Power Factor Correction

검색결과 315건 처리시간 0.025초

부스트 능동 역률개선 컨버터의 특성 (Characteristics of Boost Active Power Factor Correction Converter)

  • 장준영;인치호
    • 제어로봇시스템학회논문지
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    • 제21권12호
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    • pp.1152-1159
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    • 2015
  • Switching power supply systems are widely used in many industrial fields. Power factor correction (PFC) circuits have a tendency to be applied in new power supply designs. The PFC circuit with a boost converter using an input power source is studied in this paper. In a boost PFC circuit, there are two feedback control loops: a current feedback loop and a voltage feedback loop. In this paper, the regulation performance gained by using the output voltage and compensator to improve the transient response presented at the continuous conduction mode (CCM) of the boost PFC circuit is analyzed. The validity of the designed boost PFC circuit is confirmed by both MATLAB simulation and experimental results.

단상전원에 적합한 단일단 및 2단 역률개선회로 (Two-stage & Single-stage Power Factor Correction circuits for Single-phase Power source)

  • 김철진;유병규;김충식;김영태
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 하계학술대회 논문집 B
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    • pp.1214-1216
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    • 2004
  • Conventional Switched Mode Power Supplies(SMPS) with diode-capacitor rectifier have distorted input current waveform with high harmonic contents. Typically, these SMPS have a power factor lower than 0,65. To improve with this problem the power factor correction(PFC) circuit of power supplies has to be introduced. PFC circuit have tendency to be applied in new power supply designs. The input active power factor correction circuits can be implemented using either the two-stage or the single-stage approach. In this paper, the comparative analysis of power factor correction circuit using feedforward control with average current mode single-stage flyback method converter and two-stage converter which is combination of boost and flyback converter. The two prototypes of 50W were designed and tested a laboratory experimental. Also, the comparative analysis is confirmed by simulation and experimental results.

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Step-One in Pre-regulator Boost Power-Factor-Correction Converter Design

  • Orabi, Mohamed;Ninomiya, Tamotsu
    • Journal of Power Electronics
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    • 제4권1호
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    • pp.18-27
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    • 2004
  • The output storage capacitor of the PFC converters is commonly designed for the selected hold-up time or the allowed output ripple voltage percentage. Nevertheless, this output capacitor is a main contribution factor to the PFC system stability. Moreover, seeking for a minimum output storage capacitor that assures the PFC desired operation under all condition, and providing the advantage of a small size and low cost is the main interesting target for engineering. Therefore, in this issue the design steps of the PFC converter have been discussed depending on three choices, output ripple, hold-up time, and stability. It is cleared that any design must take the minimum required storage capacitor for stability prospective as step-l in deign, then apply for any other specification like hold-up time or ripple percentage.

전원장치용 Power Factor Correction IC 설계 (Power Factor Correction IC design for Power Supply)

  • 김형우;김상철;서길수;김기현;김남균;김은동
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 제36회 하계학술대회 논문집 C
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    • pp.1954-1956
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    • 2005
  • 본 논문에서는 SMPS(Switch-Mode Power Supply)의 역률을 개선할 수 있는 power factor correction(PFC) IC를 설계하였다. 설계된 PFC IC에는 전원장치의 power MOSFET을 구동할 수 있는 기능 이외에도 과전압, 과전류 및 단락보호 기능이 포함되어 있다. 또한 시스템이 대기상태에 있는 경우, 전압 및 전류 feedback 제어에 의해 효과적으로 대기전력을 절감할 수 있도록 설계하였다. 설계된 PFC IC는 시스템이 대기상태에서 일정시간동안 부하변동이 없을 경우 이를 감지하여 자동으로 시스템을 off 시켜 대기전력 소모를 최소화 하는 기능을 포함하고 있다.

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고조파 저감을 위한 소프트 스위칭 승압형 PFC컨버터의 특성해석 (Characteristics analysis of PFC boost converter with soft switching for harmonics reduction)

  • 김봉규
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2000년도 전력전자학술대회 논문집
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    • pp.150-154
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    • 2000
  • This paper proposes PFC boost converter with soft switching for harmonics decrement and analyzes characteristics of PFC boost converter. In this technique power factor correction(PFC) is usually obtained by operating the PFC stage in the discontinuous current mode(DCM) Switching devices are operated for reducing current stress and electronical noise. As a result eliminate 3rd harmonic component and high power factor(PF) of the input line are verified by characteristics analysis and experimental results.

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역률보상회로를 이용한 이동통신 중계기의 에너지 절감에 관한 연구 (Study on the energy savings in the mobile communication repeater using a power factor correction circuit)

  • 임병철;윤원식
    • 한국정보통신학회논문지
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    • 제18권8호
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    • pp.1854-1860
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    • 2014
  • 본 논문에서 이동통신 중계기를 위한 에너지 절감방법에 대한 연구를 수행하였다. 현재 실제 현장에서 서비스하고 있는 DB(Dual Band)소형 중계기에 있는 SMPS(Switching Mode Power Supply)에 PFC(Power Factor Correction)를 추가하여 전력소모를 감소하였으며, 이를 실제 구현하여 검증함으로써 실증된 결과를 도출하였다. 실증결과 장비 1식당 약 38.9% 피상전력 개선효과를 확인하였으며, 이를 연간으로 환산해 보면 약 230.43kWh의 에너지 절감효과가 있다.

우수한 공통 모드 노이즈 특성을 가진 브릿지 다이오드가 없는 고효율 PFC 컨버터 (High Efficiency Bridgeless Power Factor Correction Converter With Improved Common Mode Noise Characteristics)

  • 장효서;이주영;김문영;강정일;한상규
    • 전력전자학회논문지
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    • 제27권2호
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    • pp.85-91
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    • 2022
  • This study proposes a high efficiency bridgeless Power Factor Correction (PFC) converter with improved common mode noise characteristics. Conventional PFC has limitations due to low efficiency and enlarged heat sink from considerable conduction loss of bridge diode. By applying a Common Mode (CM) coupled inductor, the proposed bridgeless PFC converter generates less conduction loss as only a small magnetizing current of the CM coupled inductor flows through the input diode, thereby reducing or removing heat sink. The input diode is alternately conducted every half cycle of 60 Hz AC input voltage while a negative node of AC input voltage is always connected to the ground, thus improving common mode noise characteristics. With the aim to improve switching loss and reverse recovery of output diode, the proposed circuit employs Critical Conduction Mode (CrM) operation and it features a simple Zero Current Detection (ZCD) circuit for the CrM. In addition, the input current sensing is possible with the shunt resistor instead of the expensive current sensor. Experimental results through 480 W prototype are presented to verify the validity of the proposed circuit.

Single-Stage Half-Bridge Electronic Ballast Using a Single Coupled Inductor

  • Cho, Yong-Won;Kwon, Bong-Hwan
    • Journal of Power Electronics
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    • 제12권5호
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    • pp.699-707
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    • 2012
  • This paper proposes a single-stage half-bridge electronic ballast with a high power factor using only a single coupled inductor. Compared to conventional high power factor electronic ballasts, the proposed ballast is a simpler circuit with a low cost and a high reliability. The proposed ballast is made up of a power-factor-correction (PFC) circuit and a self-oscillating class-D inverter. The PFC and inverter stages of the proposed ballast are simplified by sharing only a single coupled inductor and two common switches. The proposed PFC circuit can achieve a high power factor and low voltage stresses of the switches. A saturable transformer in the self-oscillating class-D inverter determines the switching frequency of the ballast. Experimental results obtained on a 30W fluorescent lamp are discussed.

Dead Angle Reduction of Single-Stage PFC Using Controllable Coupled Inductors

  • Tavassol, Mohammad Mehdi;Farzanehfard, Hosein;Adib, Ehsan
    • Journal of Power Electronics
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    • 제15권1호
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    • pp.78-85
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    • 2015
  • This paper presents a new structure of single-stage flyback power factor correction (PFC) converter with a controllable coupled negative magnetic feedback (NMF) winding. NMF winding is used to reduce the bulk capacitor voltage at high line voltages and light loads. However, it would cause line current distortion at zero crossing condition. In the proposed circuit, a series winding is used with NMF inductor to eliminate the NMF inductor at low line voltages. As a result, the dead angle of the input current, near zero voltage crossing, is eliminated and the power factor is increased. The presented experimental results of the proposed PFC converter confirm the integrity of the new idea and the theoretical analysis.

낮은 120Hz 출력 전류 리플을 갖는 역률개선 LED 구동 회로 (Power Factor Correction LED Driver with Small 120Hz Current Ripple)

  • 사공석진;박현서;강정일;한상규
    • 전력전자학회논문지
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    • 제19권1호
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    • pp.91-97
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    • 2014
  • Recently, the LED(Light Emitting Diode) is expected to replace conventional lamps including incandescent, halogen and fluorescent lamps for some general illumination application, due to some obvious features such as high luminous efficiency, safety, long life, environment-friendly characteristics and so on. To drive the LED, a single stage PFC(Power Factor Correction) flyback converter has been adopted to satisfy the isolation, PFC and low cost. The conventional flyback LED driver has the serious disadvantage of high 120Hz output current ripple caused by the PFC operation. To overcome this drawback, a new PFC flyback with low 120Hz output current ripple is proposed in this paper. It is composed of 2 power stages, the DCM(Discontinuous Conduction Mode) flyback converter for PFC and BCM(Boundary Conduction Mode) boost converter for tightly regulated LED current. Since the link capacitor is located in the secondary side, its voltage stress is small. Moreover, since the driver is composed of 2 power stages, small output filter and link capacitor can be used. Especially, since the flyback is operated at DCM, the PFC can be automatically obtained and thus, an additional PFC IC is not necessary. Therefore, only one control IC for BCM boost converter is required. To confirm the validity of the proposed converter, theoretical analysis and experimental results from a prototype of 24W LED driver are presented.