• Title/Summary/Keyword: PECVD $SiO_2$

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Analysis of nano-cluster formation in the PECVD process

  • Yun, Yongsup
    • Journal of Advanced Marine Engineering and Technology
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    • v.37 no.2
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    • pp.144-148
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    • 2013
  • In this paper, the ultra water-repellent thin films were prepared by RF PECVD. On the basis of surface morphology, chemical bonding states and plasma diagnostics, a formation model of clusters for the ultra water-repellent films was discussed from considerations of formation process and laser scattering results. Moreover, using laser scattering method, the relative change of quantity of nano-clusters or size of agglomerates could be confirmed. From the results, the films were deposited with nano-clusters and those of agglomerates, which formed in organosilicon plasma, and formation of agglomerates were depended on the deposition time.

High-Efficiency a-Si:H Solar Cell Using In-Situ Plasma Treatment

  • Han, Seung Hee;Moon, Sun-Woo;Kim, Kyunghun;Kim, Sung Min;Jang, Jinhyeok;Lee, Seungmin;Kim, Jungsu
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.230-230
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    • 2013
  • In amorphous or microcrystalline thin-film silicon solar cells, p-i-n structure is used instead of p/n junction structure as in wafer-based Si solar cells. Hence, these p-i-n structured solar cells inevitably consist of many interfaces and the cell efficiency critically depends on the effective control of these interfaces. In this study, in-situ plasma treatment process of the interfaces was developed to improve the efficiency of a-Si:H solar cell. The p-i-n cell was deposited using a single-chamber VHF-PECVD system, which was driven by a pulsed-RF generator at 80 MHz. In order to solve the cross-contamination problem of p-i layer, high RF power was applied without supplying SiH4 gas after p-layer deposition, which effectively cleaned B contamination inside chamber wall from p-layer deposition. In addition to the p-i interface control, various interface control techniques such as thin layer of TiO2 deposition to prevent H2 plasma reduction of FTO layer, multiple applications of thin i-layer deposition and H2 plasma treatment, H2 plasma treatment of i-layer prior to n-layer deposition, etc. were developed. In order to reduce the reflection at the air-glass interface, anti-reflective SiO2 coating was also adopted. The initial solar cell efficiency over 11% could be achieved for test cell area of 0.2 $cm^2$.

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p-type Zn Diffusion using by Solid State Method of $GaAs_{0.60}P_{0.40}$ and the Properties of Electroluminescence (고상 확산 법에 의한 P-type Zn 확산과 $GaAs_{0.60}P_{0.40}$의 전계발광 특성)

  • Pyo, Jin-Goo;Lim, Keun-Young;So, Byung-Moon;Park, Choon-Bae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.11a
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    • pp.481-485
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    • 2003
  • To diffuse Zn at solid-state, the $SiO_2/ZnO/SiO_2$ wafers was made by PECVD and RF Spotter. Thicknesses of bottom $SiO_2$ and cap $SiO_2$ was about $500{\AA}$ and about $3500{\AA}$. First test was Diffusion temperatures were $760^{\circ}C$, $780^{\circ}C$, and $800^{\circ}C$, and diffusion times were 1, 2, 3, 4, 5, and 6 hr and 2nd test was Diffusion temperatures were $760^{\circ}C$, $720^{\circ}C$, and $680^{\circ}C$, and diffusion times were 1, 2, 3, 4, 5, and 6 hr. LED chips were fabricated by the diffused wafers at Fab. The peak wavelength of all chips showed about $625{\sim}650\;nm$ and red color Main reason for Iv change was by diffusion temperature not diffusion time. The lower temperature was the higher Iv. We thick that these properties is because of the very high diffusion temperature.

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Properties of Dielectric Constant and Bonding mode of Annealed SiOCH Thin Film (열처리한 SiOCH 박막의 결합모드와 유전상수 특성)

  • Kim, Jong-Wook;Hwang, Chang-Su;Park, Yong-Heon;Kim, Hong-Bae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.43-44
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    • 2008
  • PECVD 방식에 의거 low-k 유전상수를 갖는 층간 절연막 (ILD)를 제작하였다. 전구체 BTMSM 액체를 기화하여 16sccm 에서부터 1 sccm씩 증가하면서 25sccm 까지 p-Si[100] 기판위에 유량비를 조절하였으며 60 sccm으로 일정산소 $O_2$ 가스를 반응 챔버에 도달하도록 하였다. 제작된 시편의 구성성분은 FTIR의 흡수선으로 확인하였고, 알루미늄 전극을 구현한 MIS (Al/SiOCH/p-si(100)) 구조의 커패시터를 가지고 정전용량-전압 (C-V) 특성을 측정하여 유전상수를 계산하였다. BTMSM/$O_2$에 의한 층간절연막의 k ~ 2 근방의 저유전상수는 유량비에 민감하게 의존되고 열처리에 의하여 $CH_3$의 소멸 및 Si-O-Si(C) 성장하는 효과에 의하여 더 낮아짐을 확인할 수 있었다. 또한 상온 및 대기압에서 공기 중에 노출시켜 자연 산화과정을 겪은 시편들의 유전상수는 전체적으로 증가하였지만, 열처리한 박막이 상대적으로 안정화된 것을 확인하였다.

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Double Layer Anti-reflection Coating for Crystalline Si Solar Cell (결정질 실리콘 태양전지를 위한 이층 반사방지막 구조)

  • Park, Je Jun;Jeong, Myeong Sang;Kim, Jin Kuk;Lee, Hi-Deok;Kang, Min Gu;Song, Hee-eun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.1
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    • pp.73-79
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    • 2013
  • Crystalline silicon solar cells with $SiN_x/SiN_x$ and $SiN_x/SiO_x$ double layer anti-reflection coatings(ARC) were studied in this paper. Optimizing passivation effect and optical properties of $SiN_x$ and $SiO_x$ layer deposited by PECVD was performed prior to double layer application. When the refractive index (n) of silicon nitride was varied in range of 1.9~2.3, silicon wafer deposited with silicon nitride layer of 80 nm thickness and n= 2.2 showed the effective lifetime of $1,370{\mu}m$. Silicon nitride with n= 1.9 had the smallest extinction coefficient among these conditions. Silicon oxide layer with 110 nm thickness and n= 1.46 showed the extinction coefficient spectrum near to zero in the 300~1,100 nm region, similar to silicon nitride with n= 1.9. Thus silicon nitride with n= 1.9 and silicon oxide with n= 1.46 would be proper as the upper ARC layer with low extinction coefficient, and silicon nitride with n=2.2 as the lower layer with good passivation effect. As a result, the double layer AR coated silicon wafer showed lower surface reflection and so more light absorption, compared with $SiN_x$ single layer. With the completed solar cell with $SiN_x/SiN_x$ of n= 2.2/1.9 and $SiN_x/SiO_x$ of n= 2.2/1.46, the electrical characteristics was improved as ${\Delta}V_{oc}$= 3.7 mV, ${\Delta}_{sc}=0.11mA/cm^2$ and ${\Delta}V_{oc}$=5.2 mV, ${\Delta}J_{sc}=0.23mA/cm^2$, respectively. It led to the efficiency improvement as 0.1% and 0.23%.

Zn Diffusion using by Open-tube Method into n-type $GaAS_{0.60}P_{0.40}$ and the Properties of Electroluminescence (Open-tube 방식을 이용한 n-type $GaAS_{0.60}P_{0.40}$에 Zn 확산과 전계발광 특성)

  • Pyo, Jin-Goo;So, Soon-Jin;Park, Choon-Bae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.08a
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    • pp.63-66
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    • 2003
  • To diffuse Zn at solid-state, the $SiO-2$/ZnO/$SiO_2$ wafers was made by PECVD and RF Sputter. Thicknesses of bottom $SiO_2$ and cap $SiO_2$ was about 500 ${\AA}$ and about 3500 ${\AA}$. Diffusion temperatures were $760^{\circ}C$, $780^{\circ}C$, and $800^{circ}C$, and diffusion times were 1, 2, 3, 4, 5, and 6 hr. LED chips were fabricated by the diffused wafers at Fab. The peak wavelength of all chips showed about 625~650 nm and red color. Main reason for Iv change was by diffusion temperature not diffusion time. The lower temperature was the higher Iv. We thick that these properties is because of the very high diffusion temperature.

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Design of $Ti:LiNbO_3$ Three-Waveguide Optical Switch with Outer-Waveguide Fed (바깥도파로 입사된 $Ti:LiNbO_3$ 세 도파로 광스위치의 설계 및 제작)

  • Kim, Young-Moon;Seo, Jung-Hoon;Huh, Chang-Yul;Kim, Chang-Min
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.6
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    • pp.61-70
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    • 1999
  • An optical switch composed of three-identical, equally-spaced $Ti:LinbO_3$ waveguides and overlaid Al electrodes of CPW structure was designed and fabricated. Patterned Ti was diffused into z-cut $LinbO_3$ substrates at $1025^{\circ}C$ for 6 hours to make a three-waveguide directional coupler. $SiO_2$ buffer layer of $1.2{\mu}m$ was grown by the PECVD to reduce the propagation loss of TM mode, and Al electrodes were built on the layer for switching the guided beam. For an incident beam of ${\lambda}=1.3{\mu}m$, almost perfect optical coupling between two outer waveguides was observed. When an electric field was applied to detune the three waveguides anti-symmetrically, the optical switching phenomenon was successfully confirmed.

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The Film Property and Deposition Process of TSV Inside for 3D Interconnection (3D Interconnection을 위한 실리콘 관통 전극 내부의 절연막 증착 공정과 그 막의 특성에 관한 연구)

  • Seo, Sang-Woon;Kim, Gu-Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.3
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    • pp.47-52
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    • 2008
  • This investigation was performed in order to study the properties of deposition and layers by Silicon Dioxide, SiO2, as dielectric onto Via and Trench which have high Aspect Ratio (AR). Thus, in order to confirm these properties, three types of CVD, which were PECVD, PETEOS, and ALD, were selected. On the experiment each of the property sections was estimated that step overage of PECVD: <30%, PETEOS: 45%, ALD: 75% and the RSM of PECVD: 27.8 nm, PETEOS: 2.1 nm, ALD: <2.0 nm. As a result of this experiment for the property of electric film, ALD was valuated to be the most favorable outcome. However, ALD was valuated to have the least quality for the deposition rate. ALD deposition rate, $10\;\AA/min$ by $1\;\AA$/1cycle, was prominently lower than PETEOS, which had the deposition rate of $5000\;\AA$/min. Since electric film requires at least $1000\;\AA$ thicknesses, ALD was not suitable for the deposition rate. which is the most important component in a practical use. Therefore, in this particular study, PETEOS was evaluated to be the most suitable recipe.

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유연성 소자 적용을 위한 $SiO_x$ 보호막의 특성 평가

  • Jeong, Yu-Jeong;Jeong, Jae-Hye;Yun, Jeong-Heum;Lee, Seong-Hun;Lee, Geon-Hwan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.452-452
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    • 2010
  • 차세대 디스플레이로서 주목 받고 있는 유연성 정보표시 소자 개발에 대한 요구도가 날로 증대되고 있다. 유연성 정보표시 소자로서 플라스틱 기반 유연성 소자가 특히 주목 받고 있으나, 이의 실용화를 위해서는 플라스틱 기판에 적용 가능한 보호막 형성 기술 개발이 선행되어야 한다. 플라스틱 필름의 경우 높은 산소 및 수분 투과율 때문에 유연성 디스플레이의 응용에 걸림돌이 되고 있다. 플라스틱 기반 유연성 소자의 장수명화를 위해서는 수분과 산소의 투과를 방지하는 passivation layer 형성 기술이 필수적으로 요구된다. 본 연구에서는, polyethylene terephethalate (PET) 기판상에 증착된 $SiO_x$ 보호막의 합성에 있어서 중간층 유무에 따른 투습특성의 변화를 살펴보았다. 기화된 HMDSO (Hexamethyldisiloxane)와 Ar 및 $O_2$ 혼합기체를 이용하여 PECVD 방법으로 $SiO_x$ 박막을 합성하였다. 15 nm 두께의 $Al_2O_3$를 중간층으로 사용하여 중간층 유무에 따른 초기성장 거동 변화가 $SiO_x$ 박막의 투습 특성에 미치는 영향을 조사하였다. $SiO_x$ 박막 구조와 화학적 조성은 각각 FE-SEM과 FT-IR을 이용하여 분석하였으며, AFM을 이용하여 $SiO_x$ 박막 표면 미세 형상을 관찰하였다. 투습률은 MOCON사(社)의 Permatran-W 3/33 MA을 이용하여 측정하였다. 그리고 반복 굽힘 시험기를 이용하여 $SiO_x$ 보호막의 동적 투습 특성을 조사하였다. $Al_2O_3$ 중간층 유무에 따라 $SiO_x$ 박막의 투습률 (WVTR; water vapor transmission rate)은 ${\sim}10^{-1}g/m^2/day$(300 nm-thick $SiO_x$/PET)에서 ${\sim}5{\times}10^{-3}g/m^2/day$(300 nm-thick $SiO_x$/15 nm-thick $Al_2O_3$/PET)으로 변화하였다. 300 nm-thick $SiO_x$/15 nm-thick $Al_2O_3$/PET 시편의 경우 곡지름 50 mm에서 1,000회 반복 굽힘 후에도 투습률 변화를 보이지 않았다. 이와 같은 $SiO_x$ 박막의 투습 특성 변화는 $Al_2O_3$ 중간층 유무에 따른 초기 성장 거동의 변화로 해석된다. FE-SEM 및 AFM 표면 미세 구조 관찰을 통한 초기 성장 거동 변화 조사 결과, $Al_2O_3$ 중간층 없이 PET 기판위에 $SiO_x$ 박막 증착한 경우 3 차원 성장을 하는 반면, PET기판위에 $Al_2O_3$ 중간층 형성 후 $SiO_x$ 박막 증착하는 경우 2 차원 성장을 하게 됨을 관찰하였다. 따라서 본 연구를 통하여, 플라스틱 기반 유연성 표시 소자에 적용하기 위한 $SiO_x$ 보호막 합성 에 있어서 초기 성장 거동의 변화가 투습 특성에 민감한 영향을 미침을 알 수 있었다.

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Modeling the Properties of PECVD Silicon Dioxide Films Using Polynomial Neural Networks

  • Ryu, Younbum;Han, Seungsoo;Oh, Sungkwun;Ahn, Taechon
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1996.10a
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    • pp.234-238
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    • 1996
  • In this paper, Plasma-Enhanced Chemical Vapor Deposition (PECVD) modeling using Polynomial Neural Networks (PNN) has been introduced. The deposition of SiO2 was characterized via a 25-1 fractional factorial experiment, was used to train PNNs using predicted squared error (PSE). The optimal neural network structure and learning parameters were determined by means of a second fractional factorial experiment. The optimized networks minimized both learning and prediction error. From these PNN process models, the effect of deposition conditions on film properties has been studied. The deposition experiments were carried out in a Plasma Therm 700 series PECVD system. The models obtained will ultimately be used for several other manufacturing applications, including recipe synthesis and process control.

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