• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.278-278
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• 2009

A photovoltaic device consisting of arrays of radial p-n junction wires enables a decoupling of the requirements for light absorption and carrier extraction into orthogonal spatial directions. Each individual p-n junction wire in the cell is long in the direction of incident light, allowing for effective light absorption, but thin in orthogonal direction, allowing for effective carrier collection. To fabricate radial p-n junction solar cells, p or n-type vertical Si wire cores need to be produced. The majority of Si wires are produced by the vapor-liquid-solid (VLS) method. But contamination of the Si wires by metallic impurities such as Au, which is used for metal catalyst in the VLS technique, results in reduction of conversion efficiency of solar cells. To overcome impurity issue, top-down methods like noble metal catalytic etching is an excellent candidate. We used noble metal catalytic etching methods to make Si wire arrays. The used noble metal is two; Au and Pt. The method is noble metal deposition on photolithographycally defined Si surface by sputtering and then etching in various BOE and $H_2O_2$ solutions. The Si substrates were p-type ($10{\sim}20ohm{\cdot}cm$). The areas that noble metal was not deposited due to photo resist covering were not etched in noble metal catalytic etching. The Si wires of several tens of ${\mu}m$ in height were formed in uncovered areas by photo resist. The side surface of Si wires was very rough. When the distance of Si wires is longer than diameter of that Si nanowires are formed between Si wires. Theses Si nanowires can be removed by immersing the specimen in KOH solution. The optimum noble metal thickness exists for Si wires fabrication. The thicker or the thinner noble metal than the optimum thickness could not show well defined Si wire arrays. The solution composition observed in the highest etching rate was BOE(16.3ml)/$H_2O_2$(0.44M) in Au assisted chemical etching method. The morphology difference was compared between Au and Pt metal assisted chemical etching. The efficiencies of radial p-n junction solar Cells made of the Si wire arrays were also measured.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.11
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• pp.1652-1657
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• 1989

In this research, the PN junction type Si photodiodes have been fabricated on the low doped P type(Na=7x10**14 cm**-3) and N type (Nd=4x10**14cm**-3) (100) silicon substrates. We could find out that the dark current was lower in the N type substrate than in the P type substrate. Some well designed photodiodes showed relatively good optical and electronic characteristics that the dark current is lower than 5 nA at 10V of reverse bias condition, that the breakdown voltage is higher than 250V, and that the quantum efficiency is larger than 86% at the wavelength of $6328{\AA}$

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.532-534
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• 2000

Si thin films on p-type (100) Si substrate have been fabricated by pulsed laser deposition technique using a Nd:YAG laser. The pressure of the environmental gas during deposition was varied from 1 to 3 Torr. After deposition, Si thin film has been annealed again at nitrogen ambient. Strong violet-indigo photoluminescence have been observed from Si thin film annealed in nitrogen ambient gas. As increasing environmental gas pressure, weak green and red emissions from annealed Si thin films also observed by photoluminescence.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.12
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• pp.53-58
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• 1998

A buried channel poly-Si TFT (BCTFT) for application of high performance integrated circuits has been proposed and fabricated. BCTFT has unique features, such as the moderately-doped buried channel and counter-doped body region for conductivity modulation, and the fourth terminal entitled back bias for preventing kink effect. The n-type and p-type BCTFT exhibits superior performance to conventional poly-Si TFT in ON-current and field effect mobility due to moderate doping at the buried channel. The OFF-state leakage current is not increased because the carrier drift is suppressed by the p-n junction depletion between the moderately-doped buried channel and the counter-doped body region.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.39 no.2
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• pp.29-33
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• 2002

Various nanometer-scale structures are fabricated on hydrogen-passivated p-type Si(100) surface by scanning probe microscopy(SPM). The hydrogen-passivation is performed by dipping the samples in diluted 10% HF solution for one min.. Pt alloy wires are used for tips and the tips are made by cutting the wires at 45$^{\circ}$ slanted. Various line features are fabricated in various bias voltage. The optimal structure is the line of about 30 nm width on 1.7V bias voltage and 1 nA tunneling current.  

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.461-464
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• 1987

With the fabrication of Al-$Al_2O_3$-n(p) type Si devices, the analysis and measurement of various characteristics, this study presented the electric physical property theory for the charge distribution of MAS device $Al_2O_3$ films, and inquired out the devices available. In order to study them, Al-(450A)$Al_2O_3$-n(p) type Si was the main objects in the study. They were examined through carrier injection, C-V curves of devices on time, ${\Delta}V_{FB}$-t curves, I-V curves and $Al_2O_3$ film's breakdown characteristics.

• Journal of the Korean Institute of Telematics and Electronics
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• v.13 no.2
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• pp.23-27
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• 1976

$Si{\cdot}SnO_{2}$ heterojunction was prepared by oxidzing at oxygen atmosphere $SnO_{2-X}$ Which made by Flith evaporation of $SnO_{2}$ powder on III surface of p and n type Si single crystals. The energy band Profile of $Si{\cdot}SnO_{2}$ heterojunction was depicted from its physical properties. This heterojunction was very good rectifying junction, very sensitive in spectral response of Photovoltage at from 400nm to 1200nm, and -10$^{18}$sec of time contant. From above properties, this heterojunction was found ps good high speed photovoltaic device and solar cell.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.426.1-426.1
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• 2016

We report high work function Aluminum doped zinc oxide (AZO) films as insertion layer as a function of O2 flow rate between transparent conducting oxides (TCO) and hydrogenated amorphous silicon oxide (a-SiOx:H) layer to improve open circuit voltage (Voc) and fill factor (FF) for high efficiency thin film solar cell. However, amorphous silicon (a-Si:H) solar cells exhibit poor fill factors due to a Schottky barrier like impedance at the interface between a-SiOx:H windows and TCO. The impedance is caused by an increasing mismatch between the work function of TCO and that of p-type a-SiOx:H. In this study, we report on the silicon thin film solar cell by using as insertion layer of O2 reactive AZO films between TCO and p-type a-SiOx:H. Significant efficiency enhancement was demonstrated by using high work-function layers (4.95 eV at O2=2 sccm) for engineering the work function at the key interfaces to raise FF as well as Voc. Therefore, we can be obtained the conversion efficiency of 7 % at 13mA/cm2 of the current density (Jsc) and 63.35 % of FF.

• Advances in nano research
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• v.2 no.1
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• pp.23-56
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• 2014

The significant growth of the Si photovoltaic industry has been so far limited due to the high cost of the Si photovoltaic system. In this regard, the most expensive factors are the intrinsic cost of silicon material and the Si solar cell fabrication processes. Conventional Si solar cells have p-n junctions inside for an efficient extraction of light-generated charge carriers. However, the p-n junction is normally formed through very expensive processes requiring very high temperature (${\sim}1000^{\circ}C$). Therefore, several systems are currently under study to form heterojunctions at low temperatures. Among them, carbon nanotube (CNT)/Si hybrid solar cells are very promising, with power conversion efficiency up to 15%. In these cells, the p-type Si layer is replaced by a semitransparent CNT film deposited at room temperature on the n-doped Si wafer, thus giving rise to an overall reduction of the total Si thickness and to the fabrication of a device with cheaper methods at low temperatures. In particular, the CNT film coating the Si wafer acts as a conductive electrode for charge carrier collection and establishes a built-in voltage for separating photocarriers. Moreover, due to the CNT film optical semitransparency, most of the incoming light is absorbed in Si; thus the efficiency of the CNT/Si device is in principle comparable to that of a conventional Si one. In this paper an overview of several factors at the basis of this device operation and of the suggested improvements to its architecture is given. In addition, still open physical/technological issues are also addressed.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.4
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• pp.29-33
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• 2003

Material and electrical properties of copper-based ohmic contacts on n-type 4H-SiC were investigated for the effects of the post-annealing and the metal covering conditions. The ohmic contacts were prepared by sequential sputtering of Cu and Si layers on SiC substrate. The post-annealing treatment was performed using RTP (rapid thermal process) in vacuum and reduction ambient. The specific contact resistivity ($p_{c}$), sheet resistance ($R_{s}$), contact resistance ($R_{c}$), transfer length ($L_{T}$), were calculated from resistance (RT) versus contact spacing (d) measurements obtained from TLM (transmission line method) structure. The best result of the specific contact resistivity was obtained for the sample annealed in the reduction ambient as $p_{c}= 1.0 \times 10^{-6}\Omega \textrm{cm}^2$. The material properties of the copper contacts were also examined by using XRD. The results showed that copper silicide was formed on SiC as a result of intermixing Cu and Si layer.