• Corrosion Science and Technology
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• v.21 no.4
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• pp.282-289
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• 2022

Aluminum 1000 series alloy, a pure aluminum with excellent workability and weldability, is mainly used in the ship field. Aluminum alloy can combine with oxygen in the atmosphere and form a natural oxide film with high corrosion resistance. However, its corrosion resistance and durability are decreased when it is exposed to a harsh environment for a long period of time. For solving this problem, a porous oxide film can be formed on the surface using an anodizing treatment method, a typical surface technique among various methods. In this study, aluminum 1050 alloy was anodized for 2 minutes, 6 minutes, and 10 minutes. The structure and shape of the oxide film were then analyzed to determine the corrosion resistance according to the thickness of the oxide film that changed depending on working condition using 15 wt% NaCl. After it was immersed in NaCl solution for 1, 5, and 10 days, corrosion damage was observed. Results confirmed that the thickness of the oxide film increased as the anodization time became longer. The depth of surface damage due to corrosion became deeper when the film was immersed in the 15 wt% NaCl solution for a longer period of time.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05b
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• pp.658-660
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• 2004

In this paper, we have investigated electrical characteristics about doble gate MOSFET with changed oxide layer thickness of nam Sate and side gate, main gate and Si-substrate. We have known that optimum thickness of nam gate and side gate at 4nm, gate and Si-substrate at 3nm. We have applied for side gate voltage 3V, and drain voltage 1.5V. finally, we have known that importance of oxide layer thickness between main gate and Si-substrate better than main gate and side Sate.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.3
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• pp.185-190
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• 2015

In this study, we fabricated the indium gallium zinc oxide (IGZO), zinc oxide (ZnO), aluminum zinc oxide (AZO). oxide and silver are deposited by magnetron sputtering and thermal evaporator, respectively transparency and energy bandgap were changed by the thickness of silver layer. To fabricate metal oxide metal (OMO) structure, IGZO sputtered on a corning 1,737 glass substrate was used as bottom oxide material and then silver was evaporated on the IGZO layer, finally IGZO was sputtered on the silver layer we get the final OMO structure. The radio-frequency power of the target was fixed at 30 W. The chamber pressure was set to $6.0{\times}10^{-3}$ Torr, and the gas ratio of Ar was fixed at 25 sccm. The silver thickness are varied from 3 to 15 nm. The OMO thin films was analyzed using XRD. XRD shows broad peak which clearly indicates amorphous phase. ZnO, AZO, OMO show the peak [002] direction at $34^{\circ}$. This indicate that ZnO, AZO OMO structure show the crystalline peak. Average transmittance of visible region was over 75%, while that of infrared region was under 20%. Energy band gap of OMO layer was increased with increasing thickness of Ag layer. As a result total transmittance was decreased.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.3
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• pp.255-263
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• 2022

The subthreshold swing (SS) of an asymmetric junctionless double gate (AJLDG) MOSFET is analyzed by the use of Gaussian function. In the asymmetric structure, the thickness of the top/bottom oxide film and the flat-band voltages of top gate (V_fbf) and bottom gate (V_fbb) could be made differently, so the change in the SS for these factors is analyzed with the projected range and standard projected deviation which are parameters for the Gaussian function. An analytical subthreshold swing model is presented from the Poisson's equation, and it is shown that this model is in a good agreement with the numerical model. As a result, the SS changes linearly according to the geometric mean of the top and bottom oxide film thicknesses, and if the projected range is less than half of the silicon thickness, the SS decreases as the top gate oxide film is smaller. Conversely, if the projected range is bigger than a half of the silicon thickness, the SS decreases as the bottom gate oxide film is smaller. In addition, the SS decreases as V_fbb-V_fbf increases when the projected range is near the top gate, and the SS decreases as V_fbb-V_fbf decreases when the projected range is near the bottom gate. It is necessary that one should pay attention to the selection of the top/bottom oxide thickness and the gate metal in order to reduce the SS when designing an AJLDG MOSFET.

• Korean Journal of Materials Research
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• v.2 no.3
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• pp.180-190
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• 1992

Some solutions to several major problems in ZMR such as agglomeration of polysilicon, slips and local substrate melting are described. Experiments are performed with varying polysilicon thickness and capping oxide thickness. The aggmeration can be eliminated when nitrogen is introduced at the capping oxide layer-to-polysilicon interface and polysilicon-to-buried oxide layer interface by annealing the SOI samples at $1100^{\circ}$ in $NH_3$ ambient for three hours. The slips and local substrate melting are removed when the back surface of silicon substrate is sandblasted to produce the back surface roughness of about $20{\mu}m$. The subboundary spacing increases with increasing polysilicon thickness and the uniformity of recrystallized SOI film thickness improves with increasing capping oxide thickness, improving the quality of recrystallized SOI film. When the polysilicon thickness is about $1.0{\mu}m$ and the capping oxide thickness is $2.5{\mu}m$, the thickness variation of the recrystallized SOI film is about ${\pm}200{\AA}$ and the subboundary spacing is about $70-120{\mu}m$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.5
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• pp.992-997
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• 2016

This paper analyzes the deviation of tunneling current for the ratio of top and bottom gate oxide thickness of short channel asymmetric double gate(DG) MOSFET. The ratio of tunneling current for off current significantly increases if channel length reduces to 5 nm. This short channel effect occurs for asymmetric DGMOSFET having different top and bottom gate oxide structure. The ratio of tunneling current in off current with parameters of channel length and thickness, doping concentration, and top/bottom gate voltages is calculated in this study, and the influence of tunneling current to occur in short channel is investigated. The analytical potential distribution is obtained using Poisson equation and tunneling current using WKB(Wentzel-Kramers-Brillouin). As a result, tunneling current is greatly changed for the ratio of top and bottom gate oxide thickness in short channel asymmetric DGMOSFET, specially according to channel length, channel thickness, doping concentration, and top/bottom gate voltages.

• Journal of the Korean Ceramic Society
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• v.47 no.2
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• pp.106-112
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• 2010

This paper presents some experimental results on incubation time for massive hydriding of Zr alloys with oxide thickness. Oxide effects experiments on massive hydriding reaction of commercial Zr alloy claddings and pre-oxidized Zr alloys with hydrogen gas were carried out in the temperature range from 300 to $400^{\circ}C$ with thermo-gravimetric apparatus. Experimental results for oxide effects on massive hydriding kinetics show that incubation time is not proportional to oxide thickness and that the massive hydriding kinetics of pre-filmed Zr alloys follows linear kinetic law and the hydriding rate are similar to that of oxide-free Zr alloys once massive hydriding is initiated. There was a difference in micro-structures between oxide during incubation time and oxide after incubation time. Physical defects such as micro-cracks and pores were observed in only oxide after incubation time. Therefore, the massive hydriding of Zr alloys seems to be ascribed to short circuit path, mechacical or physical defects, such as micro-cracks and pores in the oxide rather than hydrogen diffusion through the oxide resulting from the increase of oxygen vacancies in the hypostoichiometric oxide.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1994.11a
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• pp.33-36
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• 1994

The characteristics of the nonvolatile MONOS memory devices as the nitride thickness is scaled down while maintaining constant tunneling oxide thickness and blocking oxide thickness have been investigated in order to obtain the 5V-programmable E$^2$PROM. We have found that 1V memory window for a 5V programming voltage and 10 year data retention can be achieved in the scaled MONOS memory devices with a 50 blocking oxide, a 57 nitride and a 19 tunneling oxide.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.319-323
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• 1988

For finding the effects of As on $TiSi_2$ formation, sputter deposited Ti film on Si substrates implanted with various doses of As have been rapid thermal annealed in Ar atmosphere at temperatures of 600-900$^{\circ}C$ for 20 sec. The sheet resistance of Ti-Silicides was examined with 4-point probe, the thickness with ${\alpha}$-step, and the As dopant behavior in Si substrates with ASR. The thickness of Ti-Silicides decreased with increasing As doping, but Ti-Silicides sheet resistance increased with increasing it. However, the critical concentration effect reported by Park et al. was not observed. We observed that the thickness of native oxide increase with increasing As doping. Thus, we concluded that native oxide act as a "barrier" for the Si diffusion.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.12
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• pp.1065-1070
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• 2003

HTO(High Temperature Oxide) films are mainly used as a gate insulator for polysilicon thin film transistors(Poly-Si TFT's). The HTO films, however, show the demerits of a high leakage current and a low electric breakdown voltage comparing with conventional thermal oxides even though they have a better surface in roughness than the thermal oxides. In this paper, we propose an ONO(Oxide-Nitride-Oxide) multilayer as the gate insulator for poly-Si TFT's. The leakage current and electric breakdown voltage of the ONO and HTO were measured. The drain current variation of poly-Si TFT's with a variety of gate insulators was observed. The thickness optimization in ONO films was carried out by studying I$\_$on/I$\_$off/ ratio of the poly-Si TFT's as a function of the thickness of ONO film adopted as gate insulator.