• 한국재료학회:학술대회논문집
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• 한국재료학회 2003년도 추계학술발표강연 및 논문개요집
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• pp.216-216
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• 2003

The layered nickel oxides (LiNiO$_2$) have been studied for possible use as cathode materials i3l 4V lithium batteries. Although LiCoO$_2$ has been known as the best candidate material for Li-ion batteries, which produces the best performance LiNiO$_2$ is generally accepted as an attractive cathode material, because of its various advantages such as lower cost higher discharge capacity and better reversibility. In this investigation, we calculated the electric state of LiNiO$_2$ using DV-X$\alpha$ molecular orbital method in order to obtain the information of chemical bonding among the Li, Ni and O. In LiNiO$_2$, alternate layers of Li and Ni occupy the octahedral sites of a cubic close packing of oxide ions, making up a rhombohedral structure with an R-3m space group, Li in 3a, Ni in 3b, and O in 6c sites. On the basis of this, we made the cluster model and studied ionization of each atoms and interaction between atoms according to Mullilcen population analysis.

• 한국항해항만학회:학술대회논문집
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• 한국항해항만학회 2000년도 추계학술대회논문집
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• pp.29-32
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• 2000

Cerium oxide thin film has been proposed as a buffer layer between the ferroelectric film and the Si substrate in Metal-Ferroelectric-Insulator-Silicon (MFIS ) structures for ferroelectric random access memory (FRAM) applications. In this study, CeO$_2$thin films were etched with Cl$_2$/Ar gas combination in an inductively coupled plasma (ICP). The highest etch rate of CeO$_2$film is 230 $\AA$/min at Cl$_2$/(Cl$_2$+Ar) gas mixing ratio of 0.2. This result confirms that CeO$_2$thin film is dominantly etched by Ar ions bombardment and is assisted by chemical reaction of Cl radicals. The selectivity of CeO$_2$to YMnO$_3$was 1.83. As a XPS analysis, the surface of etched CeO$_2$thin films was existed in Ce-Cl bond by chemical reaction between Ce and Cl. The results of XPS analysis were confirmed by SIMS analysis. The existence of Ce-Cl bonding was proven at 176.15 (a.m.u.).

• 한국전기전자재료학회논문지
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• 제13권6호
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• pp.514-519
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• 2000

This paper describes on the temperature characteristics of a SDB(silicon-wafer direct bonding) SOI(silicon-on-insulator) Hall sensor. Using the buried oxide $SiO_2$as a dielectrical isolation layer a SDB SOI Hall sensor without pn junction has been fabricated on the Si/ $SiO_2$/Si structure. The Hall voltage and the sensitivity of the implemented SOI Hall sensor show good linearity with respect to the applied magnetic flux density and supplied current. In the temperature range of 25 to 30$0^{\circ}C$ the shifts of TCO(temperature coefficient of the offset voltage) and TCS(temperature coefficient of the product sensitivity) are less than $\pm$6.7$\times$10$_{-3}$ and $\pm$8.2$\times$10$_{-4}$$^{\circ}C$ respectively. These results indicate that the SDB SOI structure has potential for the development of a silicon Hall sensor with a high-sensitivity and high-temperature operation.

• ETRI Journal
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• 제35권6호
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• pp.1152-1155
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• 2013

A cost-effective and simple solder on pad (SoP) process is proposed for a fine-pitch microbump interconnection. A novel solder bump maker (SBM) material is applied to form a 60-${\mu}m$ pitch SoP. SBM, which is composed of ternary Sn3.0Ag0.5Cu (SAC305) solder powder and a polymer resin, is a paste material used to perform a fine-pitch SoP through a screen printing method. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder, the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. Test vehicles with a daisy chain pattern are fabricated to develop the fine-pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si chip has 6,724 bumps with a 45-${\mu}m$ diameter and 60-${\mu}m$ pitch. The chip is flip chip bonded with a Si substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of the underfill. The optimized bonding process is validated through an electrical characterization of the daisy chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and microbump interconnection using a screen printing process.

• Bulletin of the Korean Chemical Society
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• 제32권8호
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• pp.2531-2536
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• 2011

Ethanol is a prototype molecule used in probing catalytic reactivity of oxide catalysts such as $TiO_2$. In the present study, we adsorbed ethanol on $TiO_2$(001) at room temperature (RT) and the corresponding bonding state of ethanol was systematically studied by x-ray photoemission spectroscopy (XPS) using synchrotron radiation. Especially, we compared $TiO_2$(001) surfaces prepared in ultra-high vacuum (UHV) with different surface treatments such as $Ar^+$-sputtering and oxidation with molecular $O_2$, respectively. We find that the saturation coverage of ethanol at RT varies depending on the amount of reduced surface defects (e.g., $Ti^{3+}$) which are introduced by $Ar^+$-sputtering. We also find that the oxidized $TiO_2$(001) surface has other type of surface defects (not related to Ti 3d state) which can dissociate ethanol for further reaction above 600 K. Our C 1s core level spectra indicate clearly resolved features for the two chemically distinct carbon atoms from ethanol adsorbed on $TiO_2$(001), showing the adsorption of ethanol proceeds without C-C bond dissociation. No other C 1s feature for a possible oxidized intermediate was observed up to the substrate temperature of 650 K.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 영호남학술대회 논문집
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• pp.29-33
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• 2000

This paper describes on the temperature characteristics of a SDB(silicon-wafer direct bonding) SOI(silicon-on-insulator) Hall sensor. Using the buried oxide $SiO_2$ as a dielectrical isolation layer, a SDB SOI Hall sensor without pn junction isolation has been fabricated on the Si/$SiO_2$/Si structure. The Hall voltage and the sensitivity of the implemented SOI Hall sensor show good linearity with respect to the applied magnetic flux density and supplied current. In the temperature range of 25 to $300^{\circ}C$, the shifts of TCO(temperature coefficient of the offset voltage) and TCS(temperature coefficient of the product sensitivity) are less than ${\pm}6.7{\times}10^{-3}/^{\circ}C$ and ${\pm}8.2{\times}10^{-4}/^{\circ}C$, respectively. These results indicate that the SDB SOI structure has potential for the development of a silicon Hall sensor with a high-sensitivity and high-temperature operation.

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권3호
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• pp.166-173
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• 2009

The reliability of hafnium oxide gate dielectrics incorporating lanthanum (La) is investigated. nMOSFETs with metal/La-doped high-k dielectric stack show lower $V_{th}$ and $I_{gate}$, which is attributed to the dipole formation at the high-k/$SiO_2$ interface. The reliability results well correlate with the dipole model. Due to lower trapping efficiency, the La-doping of the high-k gate stacks can provide better PBTI immunity, as well as lower charge trapping compared to the control HfSiO stacks. While the devices with La show better immunity to positive bias temperature instability (PBTI) under normal operating conditions, the threshold voltage shift (${\Delta}V_{th}$) at high field PBTI is significant. The results of a transconductance shift (${\Delta}G_m$) that traps are easily generated during high field stress because the La weakens atomic bonding in the interface layer.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 춘계학술대회 논문집 반도체 재료 센서 박막재료 전자세라믹스
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• pp.26-29
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• 2004

High density plasma fluorinated silicate glass (HDP FSG) is used as a gap fill film for metal-to-metal space because of many advantages. However, FSG films can cause critical problems such as bonding issue of top metal at package, metal contamination, metal peel-off, and so on. It is known that these problems are caused by fluorine penetration out of FSG film. To prevent it, FSG capping layers such like SRO (Silicon Rich Oxide) are needed. In this study, their characteristics and a capability to block fluorine penetration for various FSG capping layers are investigated. Normal stress and High stress due to denser film. While heat treatment to PETEOS caused lower blocking against fluorine penetration, it had insignificant effect on SiN. Compared with other layers, SRO using ARC chamber and SiN were shown a better performance to block fluorine penetration.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제41회 하계 정기 학술대회 초록집
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• pp.108-108
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• 2011

Organometallic complexes containing unpaired spins, such as metalloporphyrin or metallophthalocyanine, have extensively studied with increasing interests of their promising model systems in spintronic applications. Additionally, the use of these complexes as an acceptor molecule in chemical sensors has recently received great attentions. In this presentation, we have investigated adsorption of nitric oxide (NO) molecules at Co-porphyrin molecules on Au(111) surfaces with scanning tunneling microscopy and spectroscopy at low temperature. At the location of Co atom in Co-porphyrin molecules, we could observe a Kondo resonance state near Fermi energy in density of states (DOS) before exposing NO molecules and the Kondo resonance state was disappeared after NO exposing because the electronic spin structure of Co-porphyrin were modified by forming a cobalt-NO bonding. Furthermore, we could locally control the chemical reaction of NO dissociations from NO-CoTPP by electron injections via STM probe. After dissociation of NO molecules, the Kondo resonance state was recovered in density of state. With a help of density functional theory (DFT) calculations, we could understand that the modified electronic structures for NO-Co-porphyrin could be occurred by metal-ligand hybridization and the dissociation mechanisms of NO can be explained in terms of the resonant tunneling process via molecular orbitals.

• 한국표면공학회지
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• 제32권4호
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• pp.496-502
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• 1999

Electroplating of Ag and Au on the functional area of lead frames are required for good bonding ability in IC packaging. As the patterns of the lead frame become finer, development of new deposition technology has been required for solving problems associated with process control for uniform thickness on selected area. Sputtering was employed to investigate the adhesion between substrate Alloy42 and Ag film as a new candidate process alternative to conventional electroplating. Coating thickness of Ag film was controlled to 3.5$\mu\textrm{m}$ at room temperature as a reference. The deposition of film was optimized to ensure the adhesion by process parameters of substrate heating temperature at $100~300^{\circ}C$, sputter etching time at -300V for 10~30min, bias voltage of -100~-500V, and existence of Cr interlayer film of $500\AA$. The critical $load L_{c}$ /, defined as the minimum load at which initial damage occurs, was the highest up to 29N at bias voltage of -500V by scratch test. AFM surface image and AES depth profile were investigated to analyze the interface. The effect of bias voltage in sputtering was to improve the surface roughness and remove the oxide on Alloy42.