• Title/Summary/Keyword: Oxide Semiconductor

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Fully Room Temperature fabricated $TaO_x$ Thin Film for Non-volatile Memory

  • Choi, Sun-Young;Kim, Sang-Sig;Lee, Jeon-Kook
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.05a
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    • pp.28.2-28.2
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    • 2011
  • Resistance random access memory (ReRAM) is a promising candidate for next-generation nonvolatile memory because of its advantageous qualities such as simple structure, superior scalability, fast switching speed, low-power operation, and nondestructive readout. We investigated the resistive switching behavior of tantalum oxide that has been widely used in dynamic random access memories (DRAM) in the present semiconductor industry. As a result, it possesses full compatibility with the entrenched complementary metal-oxide-semiconductor processes. According to previous studies, TiN is a good oxygen reservoir. The TiN top electrode possesses the specific properties to control and modulate oxygen ion reproductively, which results in excellent resistive switching characteristics. This study presents fully room temperature fabricated the TiN/$TaO_x$/Pt devices and their electrical properties for nonvolatile memory application. In addition, we investigated the TiN electrode dependence of the electrical properties in $TaO_x$ memory devices. The devices exhibited a low operation voltage of 0.6 V as well as good endurance up to $10^5$ cycles. Moreover, the benefits of high devise yield multilevel storage possibility make them promising in the next generation nonvolatile memory applications.

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Annealing Effects of Tunneling Dielectrics Stacked $SiO_2/Si_3N_4$ Layers for Non-volatile Memory (비휘발성 메모리를 위한 $SiO_2/Si_3N_4$ 적층 구조를 갖는 터널링 절연막의 열처리 효과)

  • Kim, Min-Soo;Jung, Myung-Ho;Kim, Kwan-Su;Park, Goon-Ho;Jung, Jong-Wan;Chung, Hong-Bay;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.128-129
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    • 2008
  • The annealing effects of $SiO_2/Si_3N_4$ stacked tunneling dielectrics were investigated. I-V characteristics of band gap engineered tunneling gate stacks consisted of $Si_3N_4/SiO_2/Si_3N_4$(NON), $SiO_2/Si_3N_4/SiO_2$(ONO) dielectrics were evaluated and compared with $SiO_2$ single layer using the MOS(Metal-Oxide-Semiconductor) capacitor structure. The leakage currents of engineered tunneling barriers (ONO, NON stacks) are lower than that of the conventional $SiO_2$ single layer at low electrical field. Meanwhile, the engineered tunneling barriers have larger tunneling current at high electrical field and improved electrical characteristics by annealing processes than $SiO_2$ layer.

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Electrical properties of Metal-Oxide-Semiconductor (MOS) capacitor formed by oxidized-SiN (Oxidized-SiN으로 형성된 4H-SiC MOS capacitor.의 전기적 특성)

  • Moon, Jeong-Hyun;Kim, Chang-Hyun;Lee, Do-Hyun;Bahng, Wook;Kim, Nam-Kyun;Kim, Hyeong-Joon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.04b
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    • pp.45-46
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    • 2009
  • We have fabricated advanced metal-oxide-semiconductor (MOS) capacitors with thin (${\approx}10\;nm$) Inductive-Coupled Plasma (ICP) CVD $Si_xN_y$ dielectric layers and investigated electrical properties of nitrided $SiO_2$/4H-SiC interface after oxidizing the $Si_xN_y$ in dry oxidation and/or $N_2$ annealing. An improvement of electrical properties have been revealed in capacitance-voltage (C-V) and current density-electrical field (J-E) measurements if compared with non-annealed oxidized-SiN. The improvements of SiC MOS capacitors formed by oxidized-SiN have been explained in this paper.

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Preparation of Epoxy/Organoclay Nanocomposites for Electrical Insulating Material Using an Ultrasonicator

  • Park, Jae-Jun;Park, Young-Bum;Lee, Jae-Young
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.3
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    • pp.93-97
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    • 2011
  • In this paper, we discuss design considerations for an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a lateral asymmetric channel (LAC) doping profile. We employed a 0.35 ${\mu}M$ standard complementary MOSFET process for fabrication of the devices. The gates to the LAC doping overlap lengths were 0.5, 1.0, and 1.5 ${\mu}M$. The drain current ($I_{ON}$), transconductance ($g_m$), substrate current ($I_{SUB}$), drain to source leakage current ($I_{OFF}$), and channel-hot-electron (CHE) reliability characteristics were taken into account for optimum device design. The LAC devices with shorter overlap lengths demonstrated improved $I_{ON}$ and $g_m$ characteristics. On the other hand, the LAC devices with longer overlap lengths demonstrated improved CHE degradation and $I_{OFF}$ characteristics.

A Study of Suppression Current for LDMOS under Variation of Temperature (온도변화에 따른 LDMOS의 전류변동 억제에 관한 연구)

  • Jeon, Joong-Sung
    • Journal of Advanced Marine Engineering and Technology
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    • v.30 no.8
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    • pp.901-906
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    • 2006
  • In this paper, the power amplifier using active bias circuits for LDMOS(Lateral Diffused Metal Oxide Semiconductor) MRF-21180 is designed and fabricated. According to change the temperature, the gate voltage of LDMOS is controlled by the fabricated active bias circuits which is made of PNP transistor to suppress drain current. The driving amplifier using MRF-21125 and MRF-21060 is made to drive the LDMOS MRF-21180 power amplifier. The variation of current consumption in the fabricated 60 watt power amplifier has an excellent characteristics of less than 0.1 A, whereas a passive biasing circuit dissipates more than 0.5 A. The implemented power amplifier has the gain over 9 dB, the gain flatness of less than $\pm$0.1 dB and input and output return loss of less than -6 dB over the frequency range 2.11 $\sim$ 2.17 GHz. The DC operation point of this power amplifier at temperature variation 0 $^{\circ}C$ to 60 $^{\circ}C$ is fixed by active bias circuit.

The Electrical Properties of $Ta_2O_5$ Thin Films by Atomic Layer Deposition Method (원자층 증착 방법에 의한 $Ta_2O_5$ 박막의 전기적 특성)

  • Lee, Hyung-Seok;Chang, Jin-Min;Jang, Yong-Un;Lee, Seung-Bong;Moon, Byung-Moo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.05c
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    • pp.41-46
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    • 2002
  • In this work, we studied electrical characteristics and leakage current mechanism of Au/$Ta_2O_5$/Si metal-oxide-semiconductor (MOS) devices. $Ta_2O_5$ thin film (63nm) was deposited by atomic layer deposition (ALD) method at temperature of $235^{\circ}C$. The structures of the $Ta_2O_5$ thin films were examined by X-Ray Diffraction (XRD). From XRD, the structure of $Ta_2O_5$ was single phase and orthorhombic. From capacitance-voltage (C-V) analysis, the dielectric constant was 19.4. The temperature dependence of current-voltage (I-V) characteristics of $Ta_2O_5$ thin film was studied from 300 to 423 K. In ohmic region (<0.5 MVcm${-1}$), the resistivity was $2.4056{\times}10^{14}({\Omega}cm)$ at 348 K. The Schottky emission is dominant in lower temperature range from 300 to 323 K and Poole-Frenkel emission dominant in higher temperature range from 348 to 423 K.

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Evaluation of Metal Oxide Semiconductor and Electrochemical Gas Sensor Array Characterization for Measuring Wastewater Odor (폐수의 악취측정을 위한 금속산화물 반도체 및 전기화학식 가스센서 어레이 특성 평가)

  • Yim, Bongbeen;Lee, Seok-Jun;Kim, Sun-Tae
    • Journal of Sensor Science and Technology
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    • v.24 no.1
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    • pp.29-34
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    • 2015
  • This study aimed to evaluate the characterization of a metal oxide semiconductor and electrochemical gas sensor array for measuring wastewater odor. The sensitivity of all gas sensors observed in sampling method by stripping was 6.7 to 20.6 times higher than that by no stripping, except sensor D (electrochemical gas sensor). The average reduction ratio of sensor signal as a function of initial dilution rate of wastewater was in the order of food plant > food waste reutilization facility > plating plant. The sensitivity of gas sensors was dependent on both the type of wastewater and the dilution rate. The sensor signals observed by the gas sensor array were correlated with the dilution factor (OU) calculated by the air dilution sensory test with several wastewater ($r^2=0.920{\sim}0.997$), except the sensor signals of sensor D measured in the plating plant wastewater. It seems likely that the gas sensor array plays a role in the evaluation of odor in wastewater and is useful tool for on-site odor monitoring in the wastewater facilities.

Fabrication of Depth Probe Type Semiconductor Microelectrode Arrays for Neural Recording Using Both Dry and wet Etching of Silicon (실리콘 건식식각과 습식식각을 이용한 신경 신호 기록용 탐침형 반도체 미세전극 어레이의 제작)

  • 신동용;윤태환;황은정;오승재;신형철;김성준
    • Journal of Biomedical Engineering Research
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    • v.22 no.2
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    • pp.145-150
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    • 2001
  • 대뇌 피질에 삽입하여 깊이에 따라 신경 신호를 기록하기 위한 탐침형 반도체 미세전극 어레이(depth-type silicon microelectrode array, 일명 SNU probe)를 제작하였다. 붕소를 확산시켜 생성된 고농도 p-type doping된 p+ 영역을 습식식각 정지점으로 사용하는 기존의 방법과 달리 실리콘 웨이퍼의 앞면을 건식식각하여 원하는 탐침 두께만큼의 깊이로 트렌치(trench)를 형성한 후 뒷면을 습식식각하는 방법으로 탐침 형태의 미세 구조를 만들었다. 제작된 반도체 미세전극 어레이의 탐침 두께는 30 $\mu\textrm{m}$이며 실리콘 건식식각을 위한 마스크로 6 $\mu\textrm{m}$ 두께의 LTO(low temperature oxide)를 사용하였다. 탐침의 두께는 개발된 본 공정을 이용해서 5~90 $\mu\textrm{m}$ 범위까지 쉽게 조절할 수 있었다. 탐침의 두께를 보다 쉽게 조절할 수 있게 됨에 따라 여러 신경조직에 필요한 다양한 구조의 반도체 미세전극 어레이를 개발할 수 있게 되었다. 본 공정을 이용해서 개발된 4채널 SUN probe를 사용하여 흰쥐의 제1차 체감각 피질에서 4채널 신경 신호를 동시에 기록하였으며, 전기적 특성검사에서 기존의 탐침형 반도체 미세전극, 텅스텐 전극과 대등하거나 우수한 신호대 잡음비(signal to noise ratio, SNR)특성을 가짐을 확인하였다.

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A Study on the Design of Voltage Mode PWM DC/DC Power Converter (전압모드 PWM DC/DC 전력 컨버터 설계연구)

  • Lho, Young-Hwan
    • Journal of the Korean Society for Railway
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    • v.14 no.5
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    • pp.411-415
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    • 2011
  • DC/DC switching power converters are commonly used to generate a regulated DC output voltages with high efficiencies from different DC input sources. The voltage mode DC/DC converter utilizes MOSFET (metal-oxide semiconductor field effect transistor), inductor, and a PWM (pulse-width modulation) controller with oscillator, amplifier, and comparator, etc. to efficiently transfer energy from the input to the output at periodic intervals. The fundamental boost converter and a buck converter containing a switched-mode power supply are studied. In this paper, the electrical characteristics of DC/DC power converters are simulated by program of SPICE, and the PWM controller is implemented to check the operation. In addition, power efficiency is analyzed based on the specification of each component.

ITO Nanowires-embedded Transparent Metal-oxide Semiconductor Photoelectric Devices (ITO 나노와이어 기반의 투명 산화물 반도체 광전소자)

  • Kim, Hyunki;Kim, Hong-Sik;Patel, Malkeshkumar;Kim, Joondong
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.12
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    • pp.808-812
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    • 2015
  • Highly optical transparent photoelectric devices were realized by using a transparent metal-oxide semiconductor heterojunction of p-type NiO and n-type ZnO. A functional template of ITO nanowires (NWs) was applied to this transparent heterojunction device to enlarge the light-reactive surface. The ITO NWs/n-ZnO/p-NiO heterojunction device provided a significant high rectification ratio of 275 with a considerably low reverse saturation current of 0.2 nA. The optical transparency was about 80% for visible wavelengths, however showed an excellent blocking UV light. The nanostructured transparent heterojunction devices were applied for UV photodetectors to show ultra fast photoresponses with a rise time of 8.3 mS and a fall time of 20 ms, respectively. We suggest this transparent and super-performing UV responser can practically applied in transparent electronics and smart window applications.