• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.1
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• pp.130-133
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• 2010

Although many structures based on $SnO_2$ nanowires have been demonstrated, there is a limitation towards practical application due to the unwanted contact potential between the metal electrode and the $SnO_2$ nanowire. This is mostly due to the presence of the native oxide layer that acts as an insulator between the metal contact and the nanowire. In this study the contact properties between Ti/Au contacts and a single $SnO_2$ nanowire was compared to the electrical properties of a contact without the oxide layer. RIE(Reactive Ion Etching) is used to selectively remove the oxide layer from the contact area. The $SnO_2$ nanowires were synthesized by chemical vapor deposition (CVD) and dispersed on a $Si/Si_3N_4$ substrate. The Ti/Au (20nm/100nm) electrodes were formed bye-beam lithography, e-beam evaporation and a lift-off process.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.388-388
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• 2012

In this letter, We have investigated cell characteristics of the alloy FePt-NDs charge trapping memory capacitors with high-k $Al_2O_3$ dielectrics as a blocking oxide. The capacitance versus voltage (C-V) curves obtained from a representative MOS capacitor embedded with FePt-NDs synthesized by the post deposition annealing (PDA) treatment process exhibit the window of flat-band voltage shift, which indicates the presence of charge storages in the FePt-NDs. It is shown that NDs memory with high-k $Al_2O_3$ as a blocking oxide has performance in large memory window and low leakage current when the diameter of ND is below 2 nm. Moreover, high-k $Al_2O_3$ as a blocking oxide increases the electric field across the tunnel oxide, while reducing the electric field across the blocking layer. From this result, this device can achieve lower P/E voltage and lower leakage current. As a result, a FePt-NDs device with high-k $Al_2O_3$ as a blocking oxide obtained a~7V reduction in the programming voltages with 7.8 V memory.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.2
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• pp.170-174
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• 2023

Nickel oxide is a nonstoichiometric transparent conductive oxide with p-type conductivity, a wide-band energy gap of 3.4~4.0 eV, and excellent chemical stability, making it a very important candidate as a material for bipolar devices. P-type conductivity in Transparent Conductive Oxides (TCO) is controlled by the oxygen vacancy concentration. During the TCO film deposition process, additional oxygen diffusing into the NiO structure causes the formation of Ni 3p ions and Ni vacancies. This eventually affects the hole concentration of the p-type oxide thin film. In this work, the surface morphology and the electrical characteristics were confirmed in accordance with the annealing atmosphere of the nickel oxide thin film.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.288-289
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• 2011

Indium Tin Oxide (ITO) is a typical highly Transparent Conductive Oxide (TCO) currently used as a transparent electrode material. Most widely used deposition method is the sputtering process for ITO film deposition because it has a high deposition rate, allows accurate control of the film thickness and easy deposition process and high electrical/optical properties. However, to apply high quality ITO thin film in a flexible microelectronic device using a plastic substrate, conventional DC magnetron sputtering (DMS) processed ITO thin film is not suitable because it needs a high temperature thermal annealing process to obtain high optical transmittance and low resistivity, while the generally plastic substrates has low glass transition temperatures. In the room temperature sputtering process, the electrical property degradation of ITO thin film is caused by negative oxygen ions effect. This high energy negative oxygen ions(about over 100eV) can be critical physical bombardment damages against the formation of the ITO thin film, and this damage does not recover in the room temperature process that does not offer thermal annealing. Hence new ITO deposition process that can provide the high electrical/optical properties of the ITO film at room temperature is needed. To solve these limitations we develop the Magnetic Field Shielded Sputtering (MFSS) system. The MFSS is based on DMS and it has the plasma limiter, which compose the permanent magnet array (Fig.1). During the ITO thin film deposition in the MFSS process, the electrons in the plasma are trapped by the magnetic field at the plasma limiters. The plasma limiter, which has a negative potential in the MFSS process, prevents to the damage by negative oxygen ions bombardment, and increases the heat(-) up effect by the Ar ions in the bulk plasma. Fig. 2. shows the electrical properties of the MFSS ITO thin film and DMS ITO thin film at room temperature. With the increase of the sputtering pressure, the resistivity of DMS ITO increases. On the other hand, the resistivity of the MFSS ITO slightly increases and becomes lower than that of the DMS ITO at all sputtering pressures. The lowest resistivity of the DMS ITO is $1.0{\times}10-3{\Omega}{\cdot}cm$ and that of the MFSS ITO is $4.5{\times}10-4{\Omega}{\cdot}cm$. This resistivity difference is caused by the carrier mobility. The carrier mobility of the MFSS ITO is 40 $cm^2/V{\cdot}s$, which is significantly higher than that of the DMS ITO (10 $cm^2/V{\cdot}s$). The low resistivity and high carrier mobility of the MFSS ITO are due to the magnetic field shielded effect. In addition, although not shown in this paper, the roughness of the MFSS ITO thin film is lower than that of the DMS ITO thin film, and TEM, XRD and XPS analysis of the MFSS ITO show the nano-crystalline structure. As a result, the MFSS process can effectively prevent to the high energy negative oxygen ions bombardment and supply activation energies by accelerating Ar ions in the plasma; therefore, high quality ITO can be deposited at room temperature.

• Transactions on Electrical and Electronic Materials
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• v.13 no.2
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• pp.69-72
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• 2012

In this study, deposition of low-dielectric constant SiOC(H) films by conventional plasma-enhanced chemical vapor deposition (PECVD) were investigated through various characterization techniques. The results show that, with an increase in the plasma power density, the relative dielectric constant (k) of the deposited films decreases whereas the refractive index increases. This is mainly due to the incorporation of organic molecules with $CH_3$ group into the Si-O-Si cage structure. It is as confirmed by FT-IR measurements in which the absorption peak at 1,129 $cm^{-1}$ corresponding to Si-O-Si cage structure increases with power plasma density. Electrical characterization reveals that even after fast thermal annealing process, the leakage current density of the deposited films is in the order of $10^{-11}$ A/cm at 1.5 MV/cm. The reliability of the SiOC(H) film is also further characterized by using BTS test.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.21 no.3
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• pp.119-123
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• 2011

Carbon nanotilaments (CNFs) could be synthesized on nickel catalyst layer-deposited silicon oxide substrate using $C_2H_2$ and$H_2$ as source gases under thermal chemical vapor deposition system. By the incorporation of $SF_6$ as a cyclic modulation manner, the geometries of carbon coils-related materials, such as nano-sized coil and wave-like nano-sized coil could be observed on the substrate. The characteristics (formation density and morphology) of as-grown CNFs with or without $SF_6$ incorporation were investigated. Diameter size reduction for the individual CNFs-related shape and the enhancement of the formation density of CNFs-related material could be achieved by the incorporation of $SF_6$ as a cyclic modulation manner. The cause for these results was discussed in association with the slightly increased etching ability by $SF_6$ addition and the sulfur role in SF 6 for the geometry change.

• Journal of the Korean Ceramic Society
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• v.25 no.4
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• pp.341-348
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• 1988

Thin films of tin-oxide were prepared by chemical vapor deposition technique using the direct of SnCl4. Resistivity and carrier concentration of deposited SnO2 thin film were measured by 4-point probe method and Hall effect measurement. The results showed the remarkable dependence of electrical properties on the deposition temperature. As the deposition temperature increased, resistivity of deposited film initially decreased to a minimum value of ~10-3$\Omega$cm at 50$0^{\circ}C$, and then rapidly increased to ~10$\Omega$cm at $700^{\circ}C$. Electrical conductance of these films was measured in exposure to H2 gas. It was found that gas sensitivity was affected combination of film thickness and intrinsic resistivity of deposited film. Gas sensitivity increased with decrease of film thickness. Fairly high sensitivity to H2 gas was obtained for the film deposited at $700^{\circ}C$. Optimum operation temperature of sensing was 30$0^{\circ}C$ for H2 gas.

• Journal of Powder Materials
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• v.19 no.5
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• pp.367-372
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• 2012

Single crystalline Cu nanowires with controlled diameters and aspect ratios have been synthesized using electrochemical deposition within confined nanochannels of a porous anodic aluminium oxide(AAO) template. The diameters of nano-sized cylindrical pores in AAO template were adjusted by controlling the anodization conditions. Cu nanowires with diameters of approximately 38, 99, 274 nm were synthesized by the electrodeposition using the AAO templates. The crystal structure, morphology and microstructure of the Cu nanowires were systematically investigated using XRD, FE-SEM, TEM and SAED. Investigation results revealed that the Cu nanowires had the controlled diameter, high aspect ratio and single crystalline nature.

• KIEE International Transactions on Electrophysics and Applications
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• v.3C no.2
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• pp.66-69
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• 2003

Various semiconductor nanowires such as GaN, GaP, InP, Si$_3$N$_4$, SiO$_2$/Si, and SiC were coated conformally with aluminum oxide (Al$_2$O$_3$) layers by atomic layer deposition (ALD) using trimethylaluminum (TMA) and distilled water ($H_2O$) at a temperature of 20$0^{\circ}C$. Transmission electron microscopy (TEM) revealed that A1203 cylindrical shells conformally coat the semiconductor nanowires. This study suggests that the ALD of $Al_2$O$_3$ on nanowires is a promising method for preparing cylindrical dielectric shells for coaxially gated nanowire field-effect transistors.

• Transactions on Electrical and Electronic Materials
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• v.4 no.3
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• pp.15-18
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• 2003

Aluminum oxide ($Al_2O_3$) materials were coated conformally on ZnO nanorods by atomic layer deposition (ALD). The ZnO nanorods were first synthesized on a Si(100) substrate from ball-milled ZnO powders by a thermal evaporation procedure. $Al_2O_3$ films were then deposited on these ZnO nanorods by ALD at a substrate temperature of $300^{\circ}C$ using trimethylaluminum (TMA) and distilled water ($H_2O$). Transmission electron microscopy (TEM) and high-resolution transmission electron microscopy (HRTEM) images of the deposited ZnO nanorods revealed that amorphous $Al_2O_3$ cylindrical shells surround the ZnO nanorods. These TEM images illustrate that ALD has an excellent capability to coat any shape of nanorods conformally.