• Journal of Power Electronics
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• 제19권1호
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• pp.234-243
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• 2019

Studying the control strategy of a microgrid under the load unbalanced state helps to improve the stability of the system. The magnitude of the power fluctuation, which occurs between the power supply and the load, is generated in a microgrid under the load unbalanced state is called negative sequence reactive power $Q^-$. Traditional power distribution methods such as P-f, Q-E droop control can only distribute power with positive sequence current information. However, they have no effect on $Q^-$ with negative sequence current information. In this paper, a stationary-frame control method for power sharing and voltage unbalance compensation in islanded microgrids is proposed. This method is based on the proper output impedance control of distributed generation unit (DG unit) interface converters. The control system of a DG unit mainly consists of an active-power-frequency and reactive-power-voltage droop controller, an output impedance controller, and voltage and current controllers. The proposed method allows for the sharing of imbalance current among the DG unit and it can compensate voltage unbalance at the same time. The design approach of the control system is discussed in detail. Simulation and experimental results are presented. These results demonstrate that the proposed method is effective in the compensation of voltage unbalance and the power distribution.

• Journal of Power Electronics
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• 제16권6호
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• pp.2315-2326
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• 2016

This paper discusses the elimination of DC voltage deviation and the enhancement of load current sharing accuracy in multi-terminal high voltage direct current (MT-HVDC) systems. In order to minimize the power line losses in different parallel network topologies and to insure the stable operation of systems, a decentralized control method based on a modified droop control is presented in this paper. Averaging the DC output voltage and averaging the output current of two neighboring converters are employed to reduce the congestion of the communication network in a control system, and the decentralized control method is implemented. By minimizing the power loss of the cable, the optimal load current sharing proportion is derived in order to achieve rational current sharing among different converters. The validity of the proposed method using a low bandwidth communication (LBC) network for different topologies is verified. The influence of the parameters of the power cable on the control system stability is analyzed in detail. Finally, transient response simulations and experiments are performed to demonstrate the feasibility of the proposed control strategy for a MT-HVDC system.

• Journal of Power Electronics
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• 제12권4호
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• pp.643-653
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• 2012

An interleaved DC/DC converter with series-connected transformers is presented to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two half-bridge converter cells connected in series to reduce the voltage stress of the switches at one-half of the input voltage. The output sides of the two converter cells with interleaved pulse-width modulation are connected in parallel to reduce the ripple current at the output capacitor and to achieve load current sharing. Therefore, the size of the output chokes and the capacitor can be reduced. The output capacitances of the MOSFETs and the resonant inductances are resonant at the transition instant to achieve ZVS turn-on. In addition, the switching losses on the power switches are reduced. Finally, experiments on a laboratory prototype (24V/40A) are provided to demonstrate the performance of the proposed converter.

• Journal of Power Electronics
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• 제10권3호
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• pp.245-250
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• 2010

Input-series-output-parallel (ISOP) converters consisting of multiple modular DC/DC converters can enable low voltage rating switches to be used under high voltage input applications. This paper presents a digital control strategy, which can achieve equal sharing of input voltage for a modular ISOP system consisting of two-transistor forward DC/DC converters by forcing the input voltages of neighboring modules to be equal. The proposed scheme is analyzed using small signals analysis based on the state space average method. The performance of the proposed control strategy is verified with an experimental prototype of an ISOP converter made up of three two-switch forward converters.

• Journal of Power Electronics
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• 제9권2호
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• pp.133-145
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• 2009

In this paper a modular high performance MV-to-LV rectifier based on a cascaded H-bridge rectifier is presented. The proposed rectifier can directly connect to the medium voltage levels and provide a low-voltage and highly-stable DC interface with the consumer applications. The input stage eliminates the necessity for heavy and bulky step-down transformers. It corrects the input power factor and maintains the voltage balance among the individual DC buses. The second stage includes the high frequency parallel-output DC/DC converters which prepares the galvanic isolation, regulates the output voltage, and attenuates the low frequency voltage ripple ($2f_{line}$) generated by the first stage. The parallel-output converters can work in interleaving mode and the active load-current sharing technique is utilized to balance the load power among them. The detailed analysis for modeling and control of the proposed structure is presented. The validity and performance of the proposed topology is verified by simulation and experimental results.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권5호
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• pp.549-556
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• 2014

This paper proposes a highly power-efficient single-inductor multiple-outputs (SIMO) DC-DC converter with a gate charge sharing method in which gate charges of output switches are shared to improve the power efficiency and to reduce the switching power loss. The proposed converter was fabricated by using a $0.18{\mu}m$ CMOS process technology with high voltage devices of 5 V. The input voltage range of the converter is from 2.8 V to 4.2 V, which is based on a single cell lithium-ion battery, and the output voltages are 1.0 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V. Using the proposed gate charge sharing method, the maximum power efficiency is measured to be 87.2% at the total output current of 450 mA. The measured power efficiency improved by 2.1% compared with that of the SIMO DC-DC converter without the proposed gate charge sharing method.

• Journal of Power Electronics
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• 제13권2호
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• pp.177-185
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• 2013

This paper studies a soft switching DC/DC converter to achieve zero voltage switching (ZVS) for all switches under a wide range of load condition and input voltage. Two three-level PWM circuits with the same power switches are adopted to reduce the voltage stress of MOSFETs at $V_{in}/2$ and achieve load current sharing. Thus, the current stress and power rating of power semiconductors at the secondary side are reduced. The series-connected transformers are adopted in each three-level circuit. Each transformer can be operated as an inductor to smooth the output current or a transformer to achieve the electric isolation and power transfer from the input side to the output side. Therefore, no output inductor is needed at the secondary side. Two center-tapped rectifiers connected in parallel are used at the secondary side to achieve load current sharing. Due to the resonant behavior by the resonant inductance and resonant capacitance at the transition interval, all switches are turned on at ZVS. Experiments based on a 1kW prototype are provided to verify the performance of proposed converter.

• Journal of Power Electronics
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• 제10권1호
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• pp.9-13
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• 2010

This paper proposes an input-series-output-parallel connected ZVS full bridge converter with interleaved control for photovoltaic power conditioning systems (PV PCS). The input-series connection enables a fully modular power-system architecture, where low voltage and standard power modules can be connected in any combination at the input and/or at the output, to realize any given specifications. Further, the input-series connection enables the use of low-voltage MOSFETs that are optimized for a very low RDSON, thus, resulting in lower conduction losses. The system costs decrease due to the reduced current, and the volumes of the output filters due to the interleaving technique. A topology for a photovoltaic (PV) dc/dc converter that can dramatically reduce the power rating and increase the efficiency of a PV system by analyzing the PV module characteristics is proposed. The control scheme, consisting of an output voltage loop, a current loop and input voltage balancing loops, is proposed to achieve input voltage sharing and output current sharing. The total PV system is implemented for a 10-kW PV power conditioning system (PCS). This system has a dc/dc converter with a 3.6-kW power rating. It is only one-third of the total PV PCS power. A 3.6-kW prototype PV dc/dc converter is introduced to experimentally verify the proposed topology. In addition, experimental results show that the proposed topology exhibits good performance.

• Journal of Power Electronics
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• 제16권1호
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• pp.38-47
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• 2016

This paper presents DG based droop controlled parallel inverter systems with virtual impedance considering the unequal resistive-inductive combined line impedance condition. This causes a reactive power sharing error and dynamic performance degradation. Each of these drawbacks can be solved by adding the feedforward term of each line impedance voltage drop or injecting the virtual inductor. However, if the line impedances are high enough because of the long distance between the DG and the PCC or if the capacity of the system is large so that the output current is very large, this leads to a high virtual inductor voltage drop which causes reductions of the output voltage and power. Therefore, the line impedance voltage drops and the virtual inductor and resistor voltage drop compensation methods have been considered to solve these problems. The proposed method has been verified in comparison with the conventional droop method through PSIM simulation and low-scale experimental results.

• Journal of Power Electronics
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• 제15권2호
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• pp.327-337
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• 2015

This study discusses the design of a parallel-operated DC-DC single-ended primary-inductor converter (SEPIC) for low-voltage application and current sharing with a constant output voltage. A coupled inductor is used for parallel-connected SEPIC topology. Generally, two separate inductors require different ripple currents, but a coupled inductor has the advantage of using the same ripple current. Furthermore, tightly coupled inductors require only half of the ripple current that separate inductors use. In this proposed work, tightly coupled inductors are used. These produce an output that is more efficient than that from separate inductors. Two SEPICs are also connected in parallel using the coupled inductors with a single common controller. An analog control circuit is designed to generate pulse width modulation (PWM) signals and to fulfill the closed-loop control function. A stable output current-sharing strategy is proposed in this system. An experimental setup is developed for a 18.5 V, 60 W parallel SEPIC (PSEPIC) converter, and the results are verified. Results indicate that the PSEPIC provides good response for the variation of input voltage and sudden change in load.