• The Transactions of the Korean Institute of Power Electronics
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• v.3 no.4
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• pp.280-286
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• 1998

This paper proposes a novel method to reduce the torque ripple due to the non-ideality of the current sensing parts in vector-controlled inverter-fed AC motor drive systems. For PMSM(Permanent Magnet Synchronous Motor), motor output torque equations are derived in terms of their offset voltages and different voltage transducing gains. And the effects of phase current errors on motor torque are analyzed for both salient PMSM and non-salient PMSM. The proposed method can eliminate the torque ripple by nulling the offset voltages and setting the voltage transducing gains to the same value. To verify the proposed method, digital simulations are carried out for non-salient PMSM.

• Journal of Electrical Engineering and Technology
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• v.10 no.6
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• pp.2307-2314
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• 2015

In this paper, a discontinuous conduction mode (DCM) frequency control algorithm is proposed to reduce the input current ripple of a multi-phase interleaved boost converter. Unlike conventional variable duty and constant frequency control, the proposed algorithm controls the switching frequency to regulate the output voltage. By fixing the duty ratio at 1/N in the N-phase interleaved boost converter, the input current ripple can be minimized by ripple cancellation. Furthermore, the negative effects of the diode reverse recovery current are eliminated because of the DCM characteristic. A frequency controller is designed to employ the proposed algorithm considering the magnetic permeability change. The proposed algorithm is analyzed in the frequency domain and verified by a 600 W three-phase boost converter prototype that achieved 57% ripple current reduction.

• Journal of Power Electronics
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• v.16 no.3
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• pp.832-839
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• 2016

In this study, the performance of a direct current (DC)-DC buck converter is analyzed in the presence of non-idealities in passive components and semiconductor devices. The effect of these non-idealities on the various design issues of a DC-DC buck converter is studied. An improved expression for duty cycle is developed to compensate the losses that occur because of the non-idealities. The design equations for inductor and capacitor calculation are modified based on this improved expression. The effect of the variation in capacitor equivalent series resistance (ESR) on output voltage ripple (OVR) is analyzed in detail. It is observed that the value of required capacitance increases with ESR. However, beyond a maximum value of ESR (r_c,max), the capacitor is unable to maintain OVR within a specified limit. The expression of r_c,max is derived in terms of specified OVR and inductor current ripple. Finally, these theoretical studies are validated through MATLAB simulation and experimental results.

• Journal of Power Electronics
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• v.11 no.4
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• pp.499-506
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• 2011

This paper presents an interleaved active-clamping zero-voltage-switching (ZVS) forward-flyback converter without an output choke. The presented topology has two active-clamping circuits with two separated transformers. Because of the interleaved operation of the converter, the output current ripple will be reduced. The proposed converter can approximately share the total load current between the two secondaries. Therefore, the transformer copper loss and the rectifier diodes conduction loss can be decreased. The output capacitor is made of two series capacitors which reduces the peak reverse voltage of the rectifier diodes. The circuit has no output inductor and few semiconductor elements, such that the adopted circuit has a simpler structure, a lower cost and is suitable for high power density applications. A detailed analysis and the design of this new converter are described. A prototype converter has been implemented and experimental results have been recorded with an ac input voltage of 85-135Vrms, an output voltage of 12V and an output current of 16A.

• Journal of Electrical Engineering and Technology
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• v.7 no.6
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• pp.918-925
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• 2012

This paper proposes a control method for grid-connected inverter systems under unbalanced and distorted grid voltage. The proposed method can reduce the power ripple caused by the unbalanced condition and compensate for the low-order harmonics of the output currents caused by the distortion of grid voltage. To reduce the power ripple, our method replaces the two conventional PI controllers with one PR controllers in the stationary frame. PR controllers can implement selective harmonic compensation without excessive computational requirements; the use of these controllers simplifies the method. Both the simulated and experimental results agree well with the theoretical analysis.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1632-1642
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• 2014

This paper presents an interleaved resonant converter to reduce the voltage stress of power MOSFETs and achieve high circuit efficiency. Two half-bridge converters are connected in series at high voltage side to limit MOSFETs at $V_{in}/2$ voltage stress. Flying capacitor is used between two series half-bridge converters to balance two input capacitor voltages in each switching cycle. Variable switching frequency scheme is used to control the output voltage. The resonant circuit is operated at the inductive load. Thus, the input current of the resonant circuit is lagging to the fundamental input voltage. Power MOSFETs can be turn on under zero voltage switching. Two resonant circuits are connected in parallel to reduce the current stress of transformer windings and rectifier diodes at low voltage side. Interleaved pulse-width modulation is adopted to decrease the output ripple current. Finally, experiments are presented to demonstrate the performance of the proposed converter.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2291-2294
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• 2003

In this paper, analysis and control design of ac-dc converter, normally nonlinear time-varying system, using sliding mode controller to achieve fast output voltage response, disturbance rejection and robust system in the presence of load variation are demonstrated. The objective of this method is to develop methodology for output voltage to be constant and input current sinusoidal that results in nearly unity power factor, respectively. In addition the converter can be also bidirectional power flow. Simulation results using Matlab/Simulink show the effectiveness of sliding mode control system compared with linear feedback controller to guarantee enhanced PF>0.98, THD<5%, and ripple output voltage is less than 1% at the maximum output power.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.2057-2059
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• 1998

In order to maintain a high quality output voltage, conventional UPS systems use complex filters with large passive components. To overcome this drawback, real time feedback control schemes have been invested. However, these techniques require a high inverter switching frequency to dynamically adapt to changing load conditions reduce harmonics of the output voltage, thereby rendering the system inadequate for high power applications. This paper presents real time digital signal processor(DSP) control of a large capacity UPS system feeding nonlinear loads to provide a sinusoidal inverter output voltage, unity input power factor, low bus voltage ripple, and excellent transient response.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.3
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• pp.201-208
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• 2015

The effects of dead-time and offset error, which cause output current distortion in single-phase grid-connected inverters are investigated this paper. Offset error is typically generated by measuring phase current, including the voltage unbalance of analog devices and non-ideal characteristics in current measurement paths. Dead-time inevitably occurs during generation of the gate signal for controlling power semiconductor switches. Hence, the performance of the grid-connected inverter is significantly degraded because of the current ripples. The current and voltage, including ripple components on the synchronous reference frame and stationary reference frame, are analyzed in detail. An algorithm, which has the proportional resonant controller, is also proposed to reduce current ripple components in the synchronous PI current regulator. As a result, computational complexity of the proposed algorithm is greatly simplified, and the magnitude of the current ripples is significantly decreased. The simulation and experimental results are presented to verify the usefulness of the proposed current ripple reduction algorithm.

• Proceedings of the KSR Conference
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• 2010.06a
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• pp.1271-1278
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• 2010

High-speed traction has voltage source variation because the electric power of tractions is supplied by difference traction power system according to operating section. This paper proposes the robust control maintaining constant output performance against voltage source variation for PWM converters of the high speed traction. The proposed scheme consists of feed-forward compensation for current controller by on-line calculating the rms voltage of voltage source. Total dynamic performance of high speed traction can be improved by the reduction of the output voltage ripple which is resulted from voltage source sag and variation. The superior performance and validity of the proposed scheme is proved through the simulation.