• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.6
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• pp.1154-1162
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• 2016

This paper proposes a fast-transient digital LDO(Low dropout) regulator with binary-weighted current control technique. Conventional digital LDO takes a long time to stabilize the output voltage, because it controls the amount of current step by step, thus ringing problem is generated. Binary-weighted current control technique rapidly stabilizes output voltage by removing the ringing problem. When output voltage reliably reaches the target voltage, It added the FRZ mode(Freeze) to stop the operation of digital LDO. The proposed fast response digital LDO is used with a slow response DC-DC converter in the system which rapidly changes output voltage. The proposed digital controller circuit area was reduced by 56% compared to conventional bidirectional shift register, and the ripple voltage was reduced by 87%. A chip was implemented with a $0.18{\mu}F$ CMOS process. The settling time is $3.1{\mu}F$ and the voltage ripple is 6.2mV when $1{\mu}F$ output capacitor is used.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.6
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• pp.1152-1162
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• 2011

In this paper, a single-phase DC-AC inverter using two embedded Z-source converters is proposed. The proposed inverter is composed of two embedded Z-source converters with common DC source and output AC load. The output AC voltage of the inverter is obtained by the difference of output capacitor voltages of each converter. The output voltage of each converter take shape of the asymmetrical AC waveform centering zero voltage. Therefore, the proposed inverter can generate the same output voltage despite low VA rating L-C elements, compared to the conventional inverter using high DC voltage with AC ripple. To verify the validity of the proposed system, the PSIM simulation was achieved under the condition of rapid increase of DC source (110[V]${\rightarrow}$150[V]) and R-load (50[${\Omega}$]${\rightarrow}$300[${\Omega}$]). For controlling the voltage of the inverter system, the one-cycle controller was adopted. As results, the proposed inverter output the constant AC voltage (220[V]rms/60[Hz]) for all conditions. Also, the R-L load and nonlinear diode load were adopted for the proposed inverter loads, and we could know that the its output voltage characteristics were as good as the pure R-load. Finally, the RMS and THD of output AC voltage were examined for the different loads, input DC voltages and reference voltage signals.

• Journal of Electrical Engineering and Technology
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• v.4 no.1
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• pp.79-86
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• 2009

This paper presents a flyback technology in power conversion aimed at increasing efficiency and power density, reducing cost and using minimum components in AC-DC conversion. The proposed converter provides these features for square waveforms and constant frequency PWM. It is designed to operate in a wide input voltage range of 75-265VAC RMS with two output voltages of 5V and 20V respectively and full load output power of 5W. The proposed converter is suitable for high efficiency and high power density application such as LCDs, TV power modules, AC adapters, motor control, appliance control, telecom and networking products.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.1
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• pp.21-26
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• 2001

This paper proposes a new double-connected 3-phase voltage source inverter with improved output voltage waveform. An auxiliary single-phase inverter injects a ripple voltage into the double-connected inverter to converter 12-step operation to 36-step operation. The KVA rating of the output phase-shifting transformer is reduced by employing a harmonic canceling reactor. The whole rectifier-inverter system including the proposed technique is introduced, and the experimental results are provided.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1391-1401
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• 2017

In this paper, a secondary resonance half-bridge dc-dc converter with an inductive output filter is presented. The primary side of such a converter utilizes asymmetric pulse width modulation (APWM) to achieve zero-voltage switching (ZVS) of the switches, and clamps the voltage of the switch to the input voltage. In addition, zero current switching (ZCS) of the output diode is achieved by a half-wave rectifier circuit with a filter inductor and a resonant branch in the secondary side of the proposed converter. Thus, the switching losses and diode reverse-recovery losses are eliminated, and the performance of the converter can be improved. Furthermore, an inductive output filter exists in the converter reduce the output current ripple. The operational principle, performance analysis and design equation of this converter are given in this paper. The analysis results show that the output diode voltage stress is independent of the duty cycle, and that the voltage gain is almost linear, similar to that of the isolation Buck-type converter. Finally, a 200V~380V input, 24V/2A output experimental prototype is built to verify the theoretical analysis.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.5
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• pp.364-371
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• 2007

This paper deals with filter design for utility-interactive voltage-sourced PWM inverters built by single-phase half-bridge topology. By analyzing the relation between utility voltage and the ac output voltage of single-phase half-bridge inverters, the instantaneous voltage applied on the filter inductor is deduced qualitatively and quantitatively. Moreover, switching ripple current through the filter inductor is calculated from the filter inductor voltage. Based on the above mentioned analysis, filter design method is proposed by evaluating the percentage of the switching ripple current against the rated fundamental current. Proposed filter design method is verified by simulation and experiment.

• Transactions on Electrical and Electronic Materials
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• v.15 no.3
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• pp.139-143
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• 2014

In this paper, an integrated low-voltage control circuit is introduced for a charge pump DC-DC boost converter. By exploiting the advantage of the integration of the feedback control circuit within CMOS technology, the charge pump boost converter offers a low-current operation with small ripple voltage. The error amplifier, comparator, and oscillator in the control circuit are designed with the supply voltage of 3.3 V and the operating frequency of 1.6~5.5 MHz. The charge pump converter with the 4 or 8 pump stages is measured in simulation. The test in the $0.35{\mu}m$ CMOS process shows that the load current and ripple ratio are controlled under 1 mA and 2% respectively. The output-voltage is obtained from 4.8 ~ 8.5 V with the supply voltage of 3.3 V.

• Journal of Power Electronics
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• v.16 no.1
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• pp.319-328
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• 2016

In this study, we first briefly introduce the effect of circulating current control on the modulation signal of a modular multilevel converter (MMC). The maximum modulation index is also theoretically derived. According to the optimal modulation index analysis and the model in the continuous domain, different DC-side output impedance equivalent models of MMC with/without compensating component are derived. The DC-side impedance of MMC inverter station can be regarded as a series xR + yL + zC branch in both cases. The compensating component of the maximum modulation index is also related to the DC equivalent impedance with circulating current control. The frequency characteristic of impedance for MMC, which is observed from its DC side, is analyzed. Finally, this study investigates the prediction of the DC voltage ripple transfer between two-terminal MMC high-voltage direct current systems under unbalanced conditions. The rationality and accuracy of the impedance model are verified through MATLAB/Simulink simulations and experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.4
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• pp.346-353
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• 2007

This paper deals with filter design for utility-interactive voltage-sourced PWM inverters built by single-phase full-bridge topology By analyzing the relation between utility voltage and the ac output voltage of single-phase half-bridge inverters, the instantaneous voltage applied on the filter inductor is deduced qualitatively and quantitatively. Moreover, switching ripple current through the filter inductor is calculated from the filter inductor voltage. Based on the above mentioned analysis, filter design method is proposed by evaluating the percentage of the switching ripple current against the rated fundamental current. Proposed filter design method is verified by simulation and experiment.

• Journal of Electrical Engineering and Technology
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• v.11 no.1
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• pp.109-116
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• 2016

This paper proposes an analytic model for four-switch inverter (FSI)-driven wye (Y) or delta (Δ)-connected motors with a current ripple reduction algorithm. FSIs employ four switches in controlling three-phase load instead of using six switches. They have split dc-link stage, and due to this inherent structure there exists the voltage difference between upper and lower capacitors, which results in distortion of the inverter output voltage. To study characteristics of FSIs, this paper presents an advanced simulation models of FSI-driven control system for 3-phase motor that can has a wire connection either Y or Δ. In addition, this paper introduces a current ripple reduction scheme that mitigates degradation of control performance due to the voltage difference between the dc-link capacitors. The validity of the proposed method and the analytic model is verified by simulations and experiments carried out with 1-HP induction machine with Y or Δ-connection