• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.41 no.8
• /
• pp.99-103
• /
• 2004

Aperture has been employed on the ground plane in the Hairpin resonator. Aperture made by etching the part of the ground effected coupling coefficient and then quality factor of Hairpin resonator has been increased. When the hair pin oscillator using aperture has been compared with the conventional hair pin oscillator using microstrip, it has been improved the phase noise about 19dBc ＠100KHz. Oscillation frequency of the hair pin oscillator using aperture has been 5.83GHz band and output power is -4.33dBm.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.2
• /
• pp.202-207
• /
• 2015

A CMOS relaxation oscillator, with high robustness over process, voltage and temperature (PVT) variations, is designed in $0.18{\mu}m$ CMOS. The proposed oscillator, consisting of full-differential charge-discharge timing circuit and switched-capacitor based voltage-to-current conversion, could be expanded to a simple open-loop frequency synthesizer (FS) with output frequency digitally tuned. Experimental results show that the proposed oscillator conducts subcarrier generation for frequency-modulated ultra-wideband (FM-UWB) transmitters with triangular amplitude distortion less than 1%, and achieves frequency deviation less than 8% under PVT and phase noise of -112 dBc/Hz at 1 MHz offset frequency. Under oscillation frequency of 10.5 MHz, the presented design has the relative FS error less than 2% for subcarrier generation and the power dissipation of 0.6 mW from a 1.8 V supply.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
• /
• 2003.11a
• /
• pp.28-32
• /
• 2003

Aperture has been employed on the ground plane in the Hair Pin resonator. Aperture made by etching the part of the ground effected coupling coefficient and then quality factor of Hair Pin resonator has been increased. When the hair pin oscillator using aperture has been compared with the conventional hair pin oscillator using microstrip, it has been improved the phase noise about 19dBc @100KHz. Oscillation frequency of the hair pin oscillator using aperture has been 5.83GHz band and output power is -4.33dBm.

• Journal of the Korea Institute of Military Science and Technology
• /
• v.8 no.3 s.22
• /
• pp.64-72
• /
• 2005

In this paper, we propose a design method of the millimeter-wave(W-Band) waveguide cavity harmonic voltage controlled oscillator(VCO) using a Gunn diode for the armor sensor. Using the 3-dimensional simulation tool(Ansoft $HFSS^{TM}$), we were able to find the impedance matching point between waveguide and Gunn diode and estimate the oscillation frequency. A varactor diode is used for the frequency tuning, and we find out the equation for the calculation of the tunable frequency range. The designed VCO shows good performances; 17dBm output power at 94GHz center frequency, 520MHz frequency tuning range similar to the estimated value(480MHz).

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
• /
• 2003.11a
• /
• pp.361-363
• /
• 2003

The purpose of this research was to discuss the system that operated Ultra sonic transducer of Pelzo electric ceramics type. The structure of controller was made up of digital signal part drive and feedback circuit, and half bridge inverter. Digital signal part was designed to gain the stable oscillation frequency by making consideration of pointed resonance bandwidth. We tried to control inverter by forward feedback condition because BLT based on the flexibility of elements such as temperature and load condition. In addition, transducer was operated as inverter in order to enhance its power efficiency. In this experiment, output voltage waveform and current waveform have been observed by using BLT.

• Journal of electromagnetic engineering and science
• /
• v.12 no.4
• /
• pp.234-239
• /
• 2012

This paper presents a compact K-band Doppler radar sensor for human vital signal detection that uses a radar configuration with only single coupler. The proposed radar front-end configuration can reduce the chip size and the additional RF power loss. The radar front-end IC is composed of a Lange coupler, VCO, and single balanced mixer. The oscillation frequency of the VCO is from 27.3 to 27.8 GHz. The phase noise of the VCO is -91.2 dBc/Hz at a 1 MHz offset frequency, and the output power is -4.8 dBm. The conversion gain of the mixer is about 11 dB. The chip size is $0.89{\times}1.47mm^2$. The compact Ka-band Doppler radar system was developed in order to demonstrate remote human vital signal detection. The radar system consists of a Ka-band Doppler radar module with a $2{\times}2$ patch array antenna, baseband signal conditioning block, DAQ system, and signal processing program. The front-end module size is $2.5{\times}2.5cm^2$. The proposed radar sensor can properly capture a human heartbeat and respiration rate at the distance of 50 cm.

• Journal of Power Electronics
• /
• v.15 no.5
• /
• pp.1409-1420
• /
• 2015

In this paper, an algorithm using two bi-quad filters to suppress the wide-band resonance for PMSM servo systems is proposed. This algorithm is based on the double bi-quad filters structure, so it is named, "double bi-quad filter." The conventional single bi-quad filter method cannot suppress unexpected mechanical terms, which may lead to oscillations on the load side. A double bi-quad filter structure, which can cancel the effects of compliant coupling and suppress wide-band resonance, is realized by inserting a virtual filter after the motor speed output. In practical implementation, the proposed control structure is composed of two bi-quad filters on both the forward and feedback paths of the speed control loop. Both of them collectively complete the wide-band resonance suppression, and the filter on the feedback path can solve the oscillation on the load side. Meanwhile, with this approach, in certain cases, the servo system can be more robust than with the single bi-quad filter method. A step by step design procedure is provided for the proposed algorithm. Finally, its advantages are verified by theoretical analysis and experimental results.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
• /
• v.5B no.4
• /
• pp.343-349
• /
• 2005

This paper proposes a novel zero-voltage-switching (ZVS) Push-pull DC-DC Converter for high input voltage and high power applications. This topology utilizes two switches in series to replace one switch in conventional push-pull converter, and two clamping diodes are introduced. The voltage stress of the switches is the input voltage, and the switches can realize ZVS with the use of the leakage inductance of the transformer. Furthermore, secondary full-wave rectifier with a clamping capacitor is used to eliminate the voltage oscillation and spike of the rectifier diodes due to the reverse recovery. Therefore, the electromagnetic interference is reduced effectively. The operation principle of the proposed converter is analyzed theoretically. The output characteristic, ZVS condition and design principle of the clamping capacitor are discussed. Experimental results obtained from a 270V input 2kW prototype with $95.8\%$ high efficiency confirms the design.

• Journal of IKEEE
• /
• v.13 no.4
• /
• pp.63-68
• /
• 2009

The power management integrated circuit(PMIC) for CCD image sensor is presented in this study. A CCD image sensor is very sensitive against temperature. The temperature, that is heat, is generally generated by the PMIC with low efficiency. Since the generated heat influences performance of CCD image sensor, it should be minimized by using a PMIC which has a high efficiency. In order to develop the PMIC with high efficiency, the input stage is designed with synchronous type step down DC-DC converter. The operating range of the converter is from 5V to 15V and the converter is controlled using PWM method. The PWM control circuit consists of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit. The saw-tooth generator is designed with 1.2MHz oscillation frequency. The comparator is designed with the two stages OP Amp. And the error amplifier has 40dB DC gain and $77^{\circ}$ phase margin. The output of the step down converter is connected to input stage of the charge pump. The output of the charge pump is connected to input of the LDO which is the output stage of the PMIC. Finally, the PMIC, based on the PWM control circuit and the charge pump and the LDO, has output voltage of 15V, -7.5V, 3.3V and 5V. The PMIC is designed with a 0.35um process.

• Journal of IKEEE
• /
• v.18 no.4
• /
• pp.586-592
• /
• 2014

In this paper, high efficiency power management IC(PMIC) with DT-CMOS(Dynamic threshold voltage Complementary MOSFET) switching device is presented. PMIC is controlled PWM control method in order to have high power efficiency at high current level. The DT-CMOS switch with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuit consist of a saw-tooth generator, a band-gap reference(BGR) circuit, an error amplifier, comparator circuit, compensation circuit, and control block. The saw-tooth generator is made to have 1.2MHz oscillation frequency and full range of output swing from supply voltage(3.3V) to ground. The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on current mode PWM control circuits and low on-resistance switching device, achieved the high efficiency nearly 96% at 100mA output current. And Buck converter is designed along LDO in standby mode which fewer than 1mA for high efficiency. Also, this paper proposes two protection circuit in order to ensure the reliability.