• Proceedings of the KIEE Conference
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• 2002.07b
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• pp.1103-1105
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• 2002

A conventional AC-DC boost converter has much variation of input current as more increased the load or output voltage by the hysterical control method that is comparing area of current pulse by using PWM method and integration to sinusoidal input current. To improve the problems. in this paper, we propose the single-phase voltage doubler AC-DC converter circuit using the capacitor for boost:confirm characteristics of normal and transition state by using simulation, be stabilized voltage of doubler capacitor for boost, and Identify to get the sinusoidal input current with unity power factor.

• ETRI Journal
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• v.29 no.4
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• pp.470-476
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• 2007

In this paper, a versatile three-input five-output universal capacitor-grounded voltage-mode filter is proposed. The circuit employs two differential voltage current conveyors as active elements together with two grounded capacitors and four resistors as passive elements. The proposed configuration can be used as either a single-input five-output or three-input two-output. Unlike the previously reported works, it can simultaneously realize five different generic filtering signals: lowpass, bandpass, highpass, bandreject, and allpass. It still maintains the following advantages: (i) the employment of all grounded capacitors, (ii) no need to employ inverting-type input signals, (iii) no need to impose component choice, (iv) orthogonal control of the resonance angular frequency ${\omega}_o$ and the quality factor Q, and (v) low active and passive sensitivity performances.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.1
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• pp.15-24
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• 2012

In this paper, we suggest the dynamic-response-free SMPS using a new high-resolution DPWM generator based on switched-capacitor delay technique. In the proposed system, duty ratio of DPWM is controlled by voltage slope of an internal capacitor using switched-capacitor delay technique. In the proposed circuit, it is possible to track output voltage by controlling current of the internal capacitor of the DPWM generator through comparison between the feedback voltage and the reference voltage. Therefore the proposed circuit is not restricted by the dynamic-response characteristic which is a problem in the existing SMPS using the closed-loop control method. In addition, it has great advantage that ringing phenomenon due to overshoot/undershoot does not appear on output voltage. The proposed circuit can operate at switching frequencies of 1MHz~10MHz using internal operating frequency of 100 MHz. The maximum current of the core circuit is 2.7 mA and the total current of the entire circuit including output buffer is 15 mA at the switching frequency of 10 MHz. The proposed circuit has DPWM duty ratio resolution of 0.125 %. It can accommodate load current up to 1 A. The maximum ripple of output voltage is 8 mV. To verify operation of the proposed circuit, we carried out simulation with Dongbu Hitek BCD $0.35{\mu}m$ technology parameter.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.1
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• pp.55-60
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• 2017

Capacitor Charging Power Supply(CCPS) is one of the most important components of a pulsed power system. The CCPS is widely used in source of lasers, accelerators and plasma generators. This paper presents design of a dead time control circuit and operation characteristics for stable high repetition rate of high voltage CCPS. The CCPS consists of battery, high voltage transformer and controller with a dead time control circuit. A dead time control circuit was simulated by PSpice. The performance test of the CCPS was carried out with a 7[nF] load capacitor at output voltage of 50[kV] and a pulse repetition frequency of 100[Hz]. As a result, we can verify that charging and discharging waveform is stable at 100[Hz]. The experiment results indicate that 3[ms] dead time made it possible for stable high repetition rate of 100[Hz]. This paper paves the way for designing an advanced CCPS which is more applicable outside experiments.

• Journal of Power Electronics
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• v.17 no.5
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• pp.1173-1185
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• 2017

In this paper, a new single phase multilevel inverter topology with a single DC source is presented. The proposed topology is developed based on the concepts of the L-Z source inverter and the switched capacitor multilevel inverter. The input voltage to the proposed inverter is boosted by two steps: the first step by an impedance network and the second step by switched capacitor units. Compared to other existing topologies, the presented topology can produce a higher boosted multilevel output voltage while using a smaller number of components. In addition, it provides more flexibility to control boosting factor, size, cost and complexity of the inverter. The proposed inverter possesses all the advantages of the L-Z source inverter and the switched capacitor multilevel inverter like controlling the start-up inrush current and capacitor voltage balancing using a simple switching strategy. The operating principle and general expression for the different parameters of the proposed topology are presented in detail. A phase disposition pulse width modulation strategy has been developed to switch the inverter. The effectiveness of the topology is verified by extensive simulation and experimental studies on a 7-level inverter structure.

• Journal of Power Electronics
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• v.19 no.4
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• pp.869-880
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• 2019

Due to the inherent feedforward of load current, capacitor current (CC) control shows a fast transient response that makes it suitable for the power supplies used in various portable electronic devices. However, considering the effect of the outer voltage loop, the stable range of the duty-cycle is significantly diminished in CC controlled buck converters. To investigate the stability effect of the outer voltage loop on buck converters, a CC controlled buck converter with a proportion-integral (PI) compensator is taken as an example, and its second-order discrete-time model is established. Based on this model, the instability caused by the duty-cycle is discussed with consideration of the outer voltage loop. Then the dynamical effects of the feedback gain of the PI compensator and the equivalent series resistance (ESR) of the output capacitor on the CC controlled buck converter with a PI compensator are studied. Furthermore, the design-oriented closed-loop stability criterion is derived. Finally, PSIM simulations and experimental results are supplied to verify the theoretical analyses.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.5
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• pp.359-365
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• 2018

This study introduces a model predictive control method for controlling a cascaded flying capacitor multilevel rectifier used as an AC-DC rectifier of a solid-state transformer for DC distribution systems. The proposed method reduces the number of states that need to be considered in model predictive control by separately controlling input current, output DC link voltage, and flying capacitor voltage. Thus, calculation time is shortened to facilitate the level expansion of the cascaded flying capacitor multilevel rectifier. The selection of weighting factors did not present difficulties because the weighting factors in the cost function of the conventional model predictive control are not used. The effectiveness of the proposed method is verified through computer simulation using powersim and experiment.

• Journal of Power Electronics
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• v.18 no.2
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• pp.482-491
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• 2018

The practical design methodology of a three-phase dual active bridge (3ph-DAB) converter applied to low voltage direct current (LVDC) applications is proposed by using a mathematical model based on the steady-state operation. An analysis of the small-signal model (SSM) is important for the design of a proper controller to improve the stability and dynamics of the converter. The proposed lead-lag controller for the 3ph-DAB converter is designed with a simplified SSM analysis including an equivalent series resistor (ESR) for the output capacitor. The proposed controller can compensate the effects of the ESR zero of the output capacitor in the control-to-output voltage transfer function that can cause high-frequency noises. In addition, the performance of the power converter can be improved by using a controller designed by a SSM analysis without additional cost. The accuracy of the simplified SSM including the ESR zero of the output capacitor is verified by simulation software (PSIM). The design methodology of the 3ph-DAB converter and the performance of the proposed controller are verified by experimental results obtained with a 5-kW prototype 3ph-DAB converter.

• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.463-465
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• 1997

For fast response of the dc output voltage in PWM converter, the relationship of power balance of both the input and output should be introduced to the system modeling. Then, a nonlinear control theory using state feedback linearization is useful to control the system. By nonlinear control, the voltage response can be fast, so the size of the output filter capacitor can be reduced as long as the same response is kept. The validity of the proposed scheme is shown from the simulation results.

• Proceedings of the KIPE Conference
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• 2003.07b
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• pp.965-968
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• 2003

This paper describes the PWM-VSI controller of three-phase UPS system using stationary reference frame. This controller meets the specification the UPS inverter output voltage even under the unbalanced or nonlinear load. This controller is also constructed with duble control loop of the outer voltage control loop and the inner current control loop. For the fast response of the output voltage control, yhr inner current control loop of the capacitor current os used. To get the good property against overshoot, the If controller us used. The outer voltage controller is designed with P controller and the high gain transfer function is used for the zero steady state error. All control gains of both controller is designed base on the CDM method.