• Proceedings of the KIEE Conference
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• 2006.04b
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• pp.211-215
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• 2006

This paper present the Half-Bridge converter for low current output. In converter system, magnetic components are important devices used for energy storage, energy transfer, galvanic isolation and filtering. The proposed Half-Bridge converter is to reduce the number of magnetic components. The secondary rectification was discussed by comparison of center-tap type with primary center-core transformer winding and primary side-core transformer winding. A prototype featuring 400V input, 10V output, 400kHz switching frequency, and 100W output power.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.102-105
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• 2003

The leakage inductance of the High frequency Transformer(HFT) in the flyback topology can be used an inductor of the Low Pass Filter(LPF) to reduce ripple and ripple noise in the output voltage. But, the values of leakage inductance and magnetizing inductance in the HFT are within $\pm20[{\%}]$). And the operating temperature of the HFT increased by the leakage inductance. Therefore, the leakage inductance of the HFT in the flyback topology has minimum and the LPF has non-polarity ceramic capacitor in the output stage. In this paper, the LPF in the flyback topoBogy takes PCB capacitor using double layer of PCB without non-polarity ceramic capacitor. Its experimental results show the reduced ripple noise and the reduced ripple in the output stage.

• Journal of Institute of Control, Robotics and Systems
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• v.18 no.4
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• pp.371-374
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• 2012

DC/DC switching power converters produce DC output voltages from different stable DC input sources regulated by a bi-polar transistor. The converters can be used in regenerative braking of DC motors to return energy back in the supply, resulting in energy savings for the systems containing frequent stops. The voltage mode DC/DC converter is composed of a PWM (Pulse Width Modulation) controller, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an inductor, and capacitors, etc. PWM is applied to control and regulate the total output voltage. It is shown that the output of DC/DC converter depends on the variation of threshold voltage at MOSFET and the variation of pulse width. In the PWM operation, the missing pulses, the changes in pulse width, and a change in the period of the output waveform are studied by SPICE (Simulation Program with Integrated Circuit Emphasis) and experiments.

• Journal of Power Electronics
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• v.11 no.6
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• pp.779-786
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• 2011

This paper presents a soft switching converter to achieve the functions of zero voltage switching (ZVS) turn-on for the power switches and dc voltage step-up. Two circuit modules are connected in parallel in order to achieve load current sharing and to reduce the size of the transformer core. An active snubber is connected between two transformers in order to absorb the energy stored in the leakage and magnetizing inductances and to limit the voltage stresses across the switches. During the commutation stage of the two complementary switches, the output capacitance of the two switches and the leakage inductance of the transformers are resonant. Thus, the power switches can be turned on under ZVS. No output filter inductor is used in the proposed converter and the voltage stresses of the output diodes is clamped to the output voltage. The circuit configuration, the operation principles and the design considerations are presented. Finally, laboratory experiments with a 340W prototype, verifying the effectiveness of the proposed converter, are described.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1537-1543
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• 2014

This paper presents a new DC/AC multilevel converter. This configuration uses single DC sources. The proposed converter has two stages. The first stage is a DC/DC converter that can produce several DC-links in the output. The DC/DC converter is one type of boost converter and uses single inductor. The second stage is a multilevel inverter with several capacitor links. In this paper, one single input multi output DC-DC converter is used in order to voltage balancing on multilevel converter. In addition, as compare to traditional multilevel inverter, presented DC/AC multilevel converter has less on-state voltage drop and conduction losses. Finally, in order to verify the theoretical issues, simulation and experimental results are presented.

• Proceedings of the IEEK Conference
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• 2004.06a
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• pp.213-216
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• 2004

This paper describes design and implementation of the 5.5 GHz VCO with parallel-branch inductors using 0.8${\mu}m$ SiGe HBT process technology. The proposed parallel-branch inductor shows $12 \%$ improvement in quality factor in comparison with the conventional inductor. A phase noise of -93 dBc/Hz is measured at 100 kHz offset frequency, and the harmonics in the VCO are suppressed less than -23 dBc. The single-sided output power of the VCO is -6.5$\pm$1.5 dBm. The manufactured VCO consumes 15.0 mA with 2.5 V supply voltage. Its chip areas are 1.8mm ${\times}$ 1.2mm.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.5
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• pp.364-371
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• 2007

This paper deals with filter design for utility-interactive voltage-sourced PWM inverters built by single-phase half-bridge topology. By analyzing the relation between utility voltage and the ac output voltage of single-phase half-bridge inverters, the instantaneous voltage applied on the filter inductor is deduced qualitatively and quantitatively. Moreover, switching ripple current through the filter inductor is calculated from the filter inductor voltage. Based on the above mentioned analysis, filter design method is proposed by evaluating the percentage of the switching ripple current against the rated fundamental current. Proposed filter design method is verified by simulation and experiment.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2522-2525
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• 1999

Buck converter is considered to be one of the most widely used DC-DC converters due to its simple structure and high reliable performance. However, when it be combined with thin-film inductor, its own low inductance requires higher switching frequency in order to maintain optimum output ripple voltage and thus gives rise to extra switching losses. In view to overcoming such a technical in-convenience, soft switching fashion is suggested such as zero-voltage-switching of which an well known example is a Zero-Voltage-Switching clamp voltage(ZVS-CV) converter for which low inductance is imperatively required for ZVS operation. In order to support our suggestion, a 1W of ZVS-CV buck converter( Vo=3.3V, Iomax=0.3A, fs= 1.2MHz) is built by use of thin-film inductor, and then tested for comparing the measured efficiency between ours and conventional one. As the our results. the efficiency is improved about 2% at full load by the application of our concept.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.4
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• pp.37-44
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• 2001

The experimental results and application potentials of a ZVS Forward DC-DC converter based coreless PCB transformer and coreless inductor are presented. The experimental converter, that has a maximum power of 12W, maximum switching frequency of 2.2MHz and nominal input voltage of 24V, has been successfully implemented. The coreless PCB transformer and inductor are found to have many favorable characteristics to high frequency operations due to the absence of a core loss. A power conversion efficiency of the experimental converter was measured at 70${\sim}$80%, and the output was regulated at 12V within 0.7% tolerance.

• ETRI Journal
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• v.33 no.3
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• pp.366-373
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• 2011

In this paper, we propose a low-power all-digital phase-locked loop (ADPLL) with a wide input range and a high resolution time-to-digital converter (TDC). The resolution of the proposed TDC is improved by using a phase-interpolator and the time amplifier. The phase noise of the proposed ADPLL is improved by using a fine resolution digitally controlled oscillator (DCO) with an active inductor. In order to control the frequency of the DCO, the transconductance of the active inductor is tuned digitally. The die area of the ADPLL is 0.8 $mm^2$ using 0.13 ${\mu}m$ CMOS technology. The frequency resolution of the TDC is 1 ps. The DCO tuning range is 58% at 2.4 GHz and the effective DCO frequency resolution is 0.14 kHz. The phase noise of the ADPLL output at 2.4 GHz is -120.5 dBc/Hz with a 1 MHz offset. The total power consumption of the ADPLL is 12 mW from a 1.2 V supply voltage.