• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1771-1773
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• 2007

Surface modification of the gate dielectric has a strong influence on the performance of printed transistors. The surface modification occurs between the gate dielectric and semiconductor. The printed transistor with evaporated vanadium pentoxide ($V_2O_5$) modification exhibits a mobility of $0.2cm^2\;V^{-1}\;s{-1}$ and a subthreshold slope of 1.47 V/decade.

• 한국고분자학회:학술대회논문집
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• 한국고분자학회 2006년도 IUPAC International Symposium on Advanced Polymers for Emerging Technologies
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• pp.168-168
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• 2006

Low-operating voltage organic field-effect transistors (OFETs) have been realized with high dielectric constant (${\kappa}$) polymer such as cyanoethylated poly vinyl alcohol (CR-V, ${\kappa}=12$). Since the $high-{\kappa}$polymers are likely to contain water and ionic impurities, large hysteresis and considerable leakage current are frequently observed in OFETs. To solve these problems, we cross-linked the CR-V by using a cross-linking agent. Cross-linked CR-V dielectrics showed high dielectric constant of 11.1 and good insulating properties, resulting in a high capacitance ($81nF/cm^{2}$ at 1MHz) at 120 nm of dielectric thickness. Pentacene FETs with cross-linked CR-V dielectrics exhibited high carrier mobility ($0.72\;cm^{2}/Vs$), small subthreshold swing (185 mV/dec) and little hysteresis at low-operating voltage (${\Leq}-3V$).

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.409-410
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• 2008

We studied dielectric properties of Organic Light-emitting Diodes(OLEDs) depending on applied voltage of AF(Amorphous Polytetrafluoroethylene), material of hole injection layer in structure of ITO/hole injection layer (AF)/Al. AF is deposited 5 [nm] as deposition rate of 0.1~0.2 [$\AA$/s] in high vacuum of $5\times10^{-6}$ [Torr]. In result of these studies, we can know dielectric properties of OLEDs. The impedance decreases as the applied voltage increases and the Cole-Cole plots of devices are decreases as the applied voltage increases.

• 한국결정학회:학술대회논문집
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• 한국결정학회 2002년도 정기총회 및 추계학술연구발표회
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• pp.48-48
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• 2002

It is generally accepted that ultra low dielectric interlayer dielectric materials (k < 2.2) will be necessary for ULSI advanced microelectronic devices after 2003, according to the International Technology Roadmap for Semiconductors (ITRS) 2000. A continuous reduction of dielectric constant is believed to be possible only by incorporating nanopores filled with air (k = 1.0) into electrically insulating matrices such as poly(methyl silsesquioxane) (PMSSQ). The nanopo.ous low dielectric films should have excellent material properties to survive severe mechanical stress conditions imposed during the advanced semiconductor processes such as chemical mechanical planarization process and multilayer fabrication. When air is incorporated into the films for lowering k, their mechanical strength has inevitably to be sacrificed. To minimize this effect, the nanopores are controlled to exist in the film as closed cells. The micromechanical properties of the nanoporous thin films are considered more seriously than ever, particularly for ultra low dielectric applications. In this study, three approaches were made to design and develop nanoporous low dielectric films with improved micromechanical properties: 1) wall density increase of nanoporous organosilicate film by copolymerization of carbon bridged comonomers; 2) incorporation of sacrificial phases with good miscibility; 3) selective surface modification by plasma treatment. Nanoporous low-k films were prepared with copolymerized PMSSQ and star-shaped sacrificial organic molecules, both of which were synthesized to control molecular weight and functionality. The nanoporous structures of the films were observed using field emission scanning electron microscopy, cross-sectional transmission electron microscopy, atomic force microscopy, and positronium annihilation lifetime spectroscopy(PALS). Micromechanical characterization was performed using a nanoindentor to measure hardness and modulus of the films.

• 한국전기전자재료학회논문지
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• 제16권4호
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• pp.304-310
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• 2003

(Ba$\sub$0.6-x/Sr$\sub$0.4/Ca$\sub$x/)TiO$_3$(BSCT) (x=0.10, 0.15, 0.20) powder, prepared by the sol-Bel method, were mixed with organic binder and then BSCT thick films were fabricated by the screen printing techniques on alumina substrates using the BSCT paste. The structural and the dielectric Properties were investigated for various composition ratio and sintering temperature. The second phase appeared in BSCT(40/40/20) thick film sintered at 1450$^{\circ}C$. BSCT thick film thickness, obtained by four printings, was approximately 110∼120$\mu\textrm{m}$. The Curie temperature and dielectric constant at room temperature were decreased with increasing Ca content. The relative dielectric constant, dielectric loss and tunability of the BSCT(50/40/10) specimen, which was sintered at 1420$^{\circ}C$ and measured at 1MHz, were about 910, 0.46% and 9.28% at 5㎸/cm, respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1348-1351
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• 2007

We demonstrated that the threshold voltage shift owing to a gate-bias stress is originated from the trapped charges at the interface between semiconductor layer and dielectric layer, and such drawback can be settled by applying long-term delay time to the gate electrode.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.969-971
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• 2007

The black/white electronic ink containing high mobility white nano particles and the organic black pigment particles dispersed in dielectric fluid were prepared. A charge control agent affects the electrophoretic zeta potentials of white particle, which show the maximum value in zeta potential. The electronic ink panel fabricated with the charged white particles and the black particles exhibits more than 15:1 contrast ratio at 10V.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.171-171
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• 2009

We have investigated dielectric properties depending on temperature and voltage in organic light-emitting diodes using N,N'-diphenyl-N,N'-bis(3-methylphenyl)-(1,1'-biphenyl)-4,4'-di-amine (TPD) as an hole transport. We analyzed the Cole-Cole plot of TPD. When the voltage is over 3 V, we found that a radius of Cole-Cole plot and $\beta$ increase as the temperature increases to 65 $^{\circ}C$, However, as the over the 65 $^{\circ}C$, those values decrease. Also, when the voltage is below 3 V, a radius of cole-cole plot and $\beta$ increase with the increased temperature.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.1046-1048
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• 2004

Performances of organic thin film transistors (OTFTs) can be detrimentally affected by the state of the gate dielectric. Because of the bad stability of polymers, OTFTs with polymer gate dielectrics often provide abnormal characteristics. In this study, we report the condensation effect of the polymer gate dielectric layer. For the observations of the effect of the condensation, the spin-coated polymer layers with various deposition conditions were fabricated and left under low vacuum condition for several days. It is observed that the thickness of polymer layer and the electrical characteristic of OTFTs vary with the condensation time.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1135-1138
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• 2006

By ink-jet printing method, organic thin-film transistors (OTFTs) having soluble 6,13-bis (triisopropylsilylethynyl) pentacene (TIPS pentacene) as an active material were fabricated. The TIPS pentacene solution was made with chlorobenzene and anisole. The solutions were printed on poly (4-vinylphenol) (PVP) dielectric layers and source/drain electrodes by piezo-type heads for bottom contact OTFTs. The dielectric layers had untreated or HMDS-treated conditions. The chlorobenzene device showed the highest field effect mobility of $0.016\;cm^2/Vs$ and the anisole HMDS-treated device shows the highest $I_{on}/I_{off}$ ratio of $10^5$.