• Title/Summary/Keyword: Operational Amplifier

Search Result 229, Processing Time 0.03 seconds

Chaotic Dynamics of a Tansconductor-based Chua's Circuit According to Temperature Variation (트랜스콘덕터 기반 추아회로의 온도변화에 따른 카오스 다이내믹스)

  • Shin, Bong-Jo;Song, Han-Jung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.25 no.9
    • /
    • pp.686-691
    • /
    • 2012
  • In this paper, we designed a Chua's chaotic circuit using transcondcutor based nonlinear resistor. Proposed chaotic circuit consist of L, C, R and transcondcutor based Chua's diode. We performed SPICE simulation for chaotic dynamics such as time seriesform, frequency analysis and phase plane of the circuit. Chaotic dynamics of the circuit was analysed according to MOS size variation of the operational transconductance amplifier. Also, we performed SPICE circuit analysis for temperature dependance of the circuit. SPICE results showed that chaotic dynamics of the circuit varied according to the temperature variation and chaotic signals were generated in specific temperature conditions.

Low-Power and Wide-Input Range Voltage Controlled Linear Variable Resistor Using an FG-MOSFET and Its Application

  • Kushima, Muneo;Tanno, Koichi;Kumagai, Hiroo;Ishizuka, Okihiko
    • Proceedings of the IEEK Conference
    • /
    • 2002.07b
    • /
    • pp.759-762
    • /
    • 2002
  • In this paper, a voltage-controlled linear variable resistor (VCLVR) using a floating-gate MOS-FET (FG-MOSFET) is proposed. The proposed-circuit is the grounded VCLVR consists of only an ordinary MOSFET and an FG-MOSFET. The advantage of the proposed VCLVR are low-voltage and wide-input range. Next, as applications, a floating-node voltage controlled variable resistor and an operational transconductance amplifier using the proposed VCLVRs are proposed. The performance of the proposed circuits are characterized through HSPICE simulations with a standard 0.6 ${\mu}$m CMOS process. simulations of the proposed VCLVR demonstrate a resistance value of 40 k$\Omega$ to 338 k$\Omega$ and a THD of less than 1.1 %.

  • PDF

Implementation of PPF Controller Using Analog Circuit and Microprocessor (아날로그 회로와 마이크로 프로세서를 이용한 PPF 제어기의 구현)

  • Heo, Seok;Kim, Ki-Young;Kwak, Moon-Kyu
    • Transactions of the Korean Society for Noise and Vibration Engineering
    • /
    • v.14 no.6
    • /
    • pp.455-462
    • /
    • 2004
  • This paper is concerned with the implementation of the active vibration suppression controller using analog circuit and microprocessor. The target active vibration controller is the positive position feedback(PPF) controller since it provides a simple algorithm suitable for both analog circuit and digital controllers. In this study, the analog PPF controller is realized using an operational amplifier and the digital PPF controller is realized using a low-cost micro-controller. The circuit diagrams are explained in detail. We then discuss the advantages and disadvantages of both methods from the view of practical implementation. Experimental results show that both implementation methods can be effectively used for the active vibration control but need to be chosen based on the mission objective.

A Single-ended Simultaneous Bidirectional Transceiver in 65-nm CMOS Technology

  • Jeon, Min-Ki;Yoo, Changsik
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.16 no.6
    • /
    • pp.817-824
    • /
    • 2016
  • A simultaneous bidirectional transceiver over a single wire has been developed in a 65 nm CMOS technology for a command and control bus. The echo signals of the simultaneous bidirectional link are cancelled by controlling the decision level of receiver comparators without power-hungry operational amplifier (op-amp) based circuits. With the clock information embedded in the rising edges of the signals sent from the source side to the sink side, the data is recovered by an open-loop digital circuit with 20 times blind oversampling. The data rate of the simultaneous bidirectional transceiver in each direction is 75 Mbps and therefore the overall signaling bandwidth is 150 Mbps. The measured energy efficiency of the transceiver is 56.7 pJ/b and the bit-error-rate (BER) is less than $10^{-12}$ with $2^7-1$ pseudo-random binary sequence (PRBS) pattern for both signaling directions.

A High-Efficiency Driver Design for Mobile Digital Audio Speakers (모바일용 디지털 오디오 스피커를 위한 고효율 드라이버 설계)

  • Kim, Yong-Serk;Rim, Min-Joon
    • The Transactions of the Korean Institute of Electrical Engineers P
    • /
    • v.60 no.1
    • /
    • pp.19-26
    • /
    • 2011
  • In this paper, we designed Interpolation FIR(Finite Impulse Response) filter and 1-bit SDM(Sigma- Delta Modulator) for small digital audio speaker, which has low power consumption and high output characteristics. In order to achieve high linearity and low distortion performance of the systems, we adopt Type I Chevychev FIR filter which has equiripple characteristics in the pass band and proposed high efficient FIR filter structure. SDM is the most efficient modulation technique among the noise shaping techniques. In this paper, we implemented SDM using CIFB(Cascade of Intergrators, Feed-Back) which is generally used in DAC of small digital audio speakers. The proposed SDM structure can achieve high SNR, high-efficiency characteristics and low power consumption in mobile devices. Also considering manufacture of SoC(System on Chip), we performed simulation with Matlab and Verilog HDL to obtain optimal number of operational bits and verified a good experimental results.

The Design of OTA Which Has Band-width Above 50[MHz] (50[MHz] 이상의 대역폭을 갖는 OTA 설계)

  • Kim, S.;Bang, J.H.;Yun, C.H.;Kim, D.Y.
    • Proceedings of the KIEE Conference
    • /
    • 1990.07a
    • /
    • pp.525-528
    • /
    • 1990
  • In this paper, a CMOS Operational Transconductance Amplifier (OTA) which is used for high-frequency operation has been designed and simulated by SPICE 2G program. To increase input linear range, the input stage is designed by cross-coupled pair. And the output stage insert buffer stage for the buffing and gain. The band-width of designed OTA is $50{\sim}60$ [MHz].

  • PDF

The Three-Stage Operational Amplifier Design for High Speed Signal Processing (고속 신호처리를 위한 3-Stage 연산증폭기 설계)

  • Kim, D.Y.;Jo, S.I.;Kim, S.;Bang, J.H.
    • Proceedings of the KIEE Conference
    • /
    • 1990.07a
    • /
    • pp.521-524
    • /
    • 1990
  • There is an increasing interest in high-speed signal processing in modern telecommunication and consumer electronics applications. HDTV, ISDN. A limiting factor in Op-Amp based analog integrated circuits is the limited useful frequency range. This research program will develop a new CMOS Op-Amp architecture with improved gainband width product. The new design CMOS Op-Amp will achieve up to 100MHz unity gainband width with a 1.5-micron design rule.

  • PDF

Study on the High Sensitive Three Phase Power Factor Meter and Relay (고감도 삼상력률계전기에 관한 연구)

  • 박정후
    • Journal of the Korean Society of Fisheries and Ocean Technology
    • /
    • v.16 no.1
    • /
    • pp.43-47
    • /
    • 1980
  • The author designed and tested the high sensitive three-phase power factor meter and relay circuit, and dealt with the circuit to detect the phase of the current and the voltage. An operational amplifier comparator circuit and two single-phase transformers are used to control and detect the phase angle between the current and the voltage. The results obtained are as follows: 1. Converting the sine wave input current into the constant amplitude rectangular wave form by using a transistor chopper circuit, the power factor can be measured precisely over the load current of 0.08 A. 2. Using the moving coil type current meter, the power factor meter can be read in uniform . scale all over the range. 3. Using the three-phase power factor meter, the power factor relay which works at any power factor can be made.

  • PDF

The simulated floating inductor using of fully-differential OTAs and its application to a ladder-type third-order elliptic low-pass filter

  • Lee, Ju-Chan;Lee, Jang-Hyuck;Park, Hee-Jong;Shin, Hee-Jong;Park, Ji-Mann;Cha, Hyeong-Woo;Chung, Won-Sup
    • Proceedings of the IEEK Conference
    • /
    • 2000.07a
    • /
    • pp.159-162
    • /
    • 2000
  • Novel simulated floating inductor (SFI) using fully-differential operational transconductance amplifier (FOTA) is presented. The SFI only consists of two FOTA and a capacitor. A ladder-type third-order elliptic low-pass filter is also presented for the SFI’s application. The theory of operations described and the simulation results are used to verify theoretical predictions. The SFI shows close agreement between predicted behavior and simulation performance. The simulation results that the SFI have The temperature coefficient of-179 ppm/$^{\circ}C$ and Q factor of 120 at 200kHz at supply voltage ${\pm}$5 V.

  • PDF

Small-Signal Analysis of a Differential Two-Stage Folded-Cascode CMOS Op Amp

  • Yu, Sang Dae
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.14 no.6
    • /
    • pp.768-776
    • /
    • 2014
  • Using a simplified high-frequency small-signal equivalent circuit model for BSIM3 MOSFET, the fully differential two-stage folded-cascode CMOS operational amplifier is analyzed to obtain its small-signal voltage transfer function. As a result, the expressions for dc gain, five zero frequencies, five pole frequencies, unity-gain frequency, and phase margin are derived for op amp design using design equations. Then the analysis result is verified through the comparison with Spice simulations of both a high speed op amp and a low power op amp designed for the $0.13{\mu}m$ CMOS process.