• School Mathematics
• /
• v.19 no.1
• /
• pp.59-75
• /
• 2017

This study analyzed the $6^{th}$ graders' constructions about fraction operations and schemes and figured out the relationships quantitatively between operations and schemes through the written test of 432 students. The results of this study showed that most of students could do partitioning operation well, however, there were many students who had difficulties on iterating operation. There were more students who constructed partitioning operation prior to iterating operation than the opposite. The rate of students who constructed high schemes was lower than that of students who constructed low schemes according to the hierarchy of fraction schemes. Especially, there were many students who construct partitive unit fraction scheme but not partitive fraction scheme, because they could compose unit fraction but not do iterating it. And there were the high correlations between fraction operations and schemes. Given these result, this paper suggests implications about the teaching and learning of fraction.

• Journal of Power Electronics
• /
• v.11 no.5
• /
• pp.688-696
• /
• 2011

This paper proposes a simple space vector PWM (SVPWM) scheme including overmodulation operation for 3-level NPC (Neutral Point Clamped) Inverters. The proposed scheme features a simple decision and calculation procedure for determining switching times in the overmodulation range by utilizing the duty calculation method used in 2-level inverters and the minimum phase error projection method widely employed in motor drive systems. The proposed scheme does not need to detect the angle of the reference vector or calculate trigonometric functions to determine the magnitude of the voltage vector. The magnitude of the angle of the new reference voltage vector is decided in advance with the help of the Fourier Series Expansion to extend the linearity of the output voltage of 3-level inverters in the overmodulation region. Experimental results demonstrate the validity of the proposed SVPWM scheme including overmodulation operation for 3-level NPC inverters.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.58 no.3
• /
• pp.455-461
• /
• 2009

This paper proposes Direct Load Control(DLC) operation scheme using a bidding system and the methodology to value proper quantity decided by the DLC program, which is a kind of resources for stabilization of electricity market price during peak times by managing consumer electricity demand. Since DLC program in Korea is based on the contract with the customers participating in this program, it is difficult to anticipate voluntary participation. That is, incentive for participants in DLC program is insufficient. To cope with this point, it is necessary to develop a new market mechanism and market compatible operation scheme for DLC programs. DLC market mechanism is deemed to be equipped with iterative bidding system, independent operation from energy market, and interactive with bidding information on energy market. With this market mechanism, it is important to find the optimal operation point of DLC allowing for the factors of stabilizing the electricity market price and compensating DLC implementation. This paper focuses on the mathematical approaches for the bid-based DLC operation scheme and examines several scenarios for the following technical justifications: 1) stabilization of electricity market price during peak times, 2) elasticity of demand.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.63 no.1
• /
• pp.18-26
• /
• 2014

A microgrid can play a significant role for enlargement of renewable energy sources and emission reduction because it is a network of small, distributed electrical power generators operated as a collective unit. In this paper, an application of optimization method to economical operation of a microgrid is studied. The microgrid to be studied here is composed of distributed generation system(DGS), battery systems and loads. The distributed generation systems include combined heat and power(CHP) and small generators such as diesel generators and the renewable energy generators such as photovoltaic(PV) systems, wind power systems. Both of thermal loads and electrical loads are included here as loads. Also the emissions trading scheme to be applied in near future, the cost of unit start-up and the operational characteristics of battery systems are considered as well as the probabilistic characteristics of the renewable energy generation and load. A mathematical equation for optimal operation of this system is modeled based on the mixed integer programming. It is shown that this optimization methodology can be effectively used for economical operation of a microgrid by the case studies.

• Journal of applied mathematics & informatics
• /
• v.31 no.3_4
• /
• pp.425-441
• /
• 2013

In literature, several strong designated verifier signature (SDVS) schemes have been devised using elliptic curve bilinear pairing and map-topoint (MTP) hash function. The bilinear pairing requires a super-singular elliptic curve group having large number of elements and the relative computation cost of it is approximately two to three times higher than that of elliptic curve point multiplication, which indicates that bilinear pairing is an expensive operation. Moreover, the MTP function, which maps a user identity into an elliptic curve point, is more expensive than an elliptic curve scalar point multiplication. Hence, the SDVS schemes from bilinear pairing and MTP hash function are not efficient in real environments. Thus, a cost-efficient SDVS scheme using elliptic curve cryptography with pairingfree operation is proposed in this paper that instead of MTP hash function uses a general cryptographic hash function. The security analysis shows that our scheme is secure in the random oracle model with the hardness assumption of CDH problem. In addition, the formal security validation of the proposed scheme is done using AVISPA tool (Automated Validation of Internet Security Protocols and Applications) that demonstrated that our scheme is unforgeable against passive and active attacks. Our scheme also satisfies the different properties of an SDVS scheme including strongness, source hiding, non-transferability and unforgeability. The comparison of our scheme with others are given, which shows that it outperforms in terms of security, computation cost and bandwidth requirement.

• Proceedings of the KIEE Conference
• /
• 2009.07a
• /
• pp.215_216
• /
• 2009

This paper presents a asymmetry fault current reduction scheme with recloser operation during transient period. The principle of asymmetry current nature is reviewed and asymmetry components reduction with recloser operation is explained. Throughout the simulation, results verifies the proposed scheme for recloser operation and its effectiveness.

• Journal of the Korea Society for Simulation
• /
• v.3 no.1
• /
• pp.55-63
• /
• 1994

FMS is two or more computer controlled units interconnected with automated workhandling equipment and supervised by an executive computer having random scheduling capabilities. The complex nature of a FMS, coupled with the need to maximize its performance, means that such a system can be effectly designed only by iterative computer simulation methods. At the operational level, simulation had a reduced role to evaluate the performance of planned FMS under a variety of operating strategies. This is probably due to the fact that few simulation models are able to access the current status data of the system. This study reviews the role of simulation for design/operation of FMS and suggests an interface scheme for incorporating a simulation package with a FMS operational database. This scheme can be used for reducing the performance gap between design and real operation of a FMS.

• Proceedings of the KIEE Conference
• /
• 2006.04a
• /
• pp.267-269
• /
• 2006

Recently, flash memories are one of best media to support portable computer's storages in mobile computing environment. The features of non-volatility, low power consumption, and fast access time for read operations are sufficient grounds to support flash memory as major database storage components of portable computers. However, we need to improve traditional Indexing scheme such as B-Tree due to the relatively slow characteristics of flash operation as compared to RAM memory. In order to achieve this goal, we devise a new indexing scheme called F-Tree. F-Tree improves tree operation performance by compressing pointers and keys in tree nodes and rewriting the nodes without a slow erase operation in node insert/delete processes.

• Journal of Electrical Engineering and Technology
• /
• v.7 no.6
• /
• pp.869-875
• /
• 2012

Because of the nature of wind, the output power of wind turbines fluctuates according to wind speed variation. Therefore, many countries have set up wind-turbine interconnection standards usually named as Grid-Code to regulate the output power of wind farms to improve power system reliability and power quality. This paper proposes three operation modes of wind farms such as maximum power point tracking (MPPT) mode, single wind turbine control mode and wind farm control mode to control the output power of wind turbines as well as overall wind farms. This paper also proposes an operation scheme of wind farm to alleviate power fluctuation of wind farm by choosing the appropriate control mode and coordinating multiple wind turbines in consideration of grid conditions. The performance of the proposed scheme is verified via simulation studies in PSCAD/EMTDC with doubly-fed induction generator (DFIG) based wind turbine models.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.21 no.5
• /
• pp.1345-1359
• /
• 1996

This paper presents a floating point arithmetic unit (FPAU) for supescalar microprocessor that executes fifteen operations such as addition, subtraction, data format converting, and compare operation using two pipelined arithmetic paths and new rounding and normalization scheme. By using two pipelined arithmetic paths, each aritchmetic operation can be assigned into appropriate arithmetic path which high speed operation is possible. The proposed normalization an rouding scheme enables the FPAU to execute roundig operation in parallel with normalization and to reduce timing delay of post-normalization. And by predicting leading one position of results using input operands, leading one detection(LOD) operation to normalize results in the conventional arithmetic unit can be eliminated. Because the FPAU can execuate fifteen single-precision or double-precision floating-point arithmetic operations through three-stage pipelined datapath and support IEEE standard 754, it has appropriate structure which can be ingegrated into superscalar microprocessor.