• Title/Summary/Keyword: On-wafer Inductor

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Realization of High Q Inductor on Low Resistivity Silicon Wafer using a New and simple Trench Technique (새로운 트랜치 방법을 이용한 저저항 실리콘 기판에서의 High Q 인덕터의 구현)

  • 이홍수;이진효유현규김대용
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.629-632
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    • 1998
  • This paper presents a new and simple technique to realize high Q inductor on low resistivity silicon wafer with 6 $\Omega$.cm. This technique is very compatible with bipolar and CMOS standard silicon process. By forming the deep and narrow trenches on the low resistivity wafer substrate under inductor pattern, oxidizing and filling with undoped polysilicon, the low resistivity silicon wafer acts as high resistivity wafer being suitable for the fabrication of high Q inductor. By using this technique the quality factor (Q) for 8-turn spiral inductor was improved up to max. 10.3 at 2 ㎓ with 3.0 $\mu\textrm{m}$ of metal thickness. The experiment results show that Q on low resistivity silicon wafer with the trench technique have been improved more than 2 times compared to the conventional low resistivity silicon wafer without trenches.

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Development of High-Quality LTCC Solenoid Inductor using Solder ball and Air Cavity for 3-D SiP

  • Bae, Hyun-Cheol;Choi, Kwang-Seong;Eom, Yong-Sung;Kim, Sung-Chan;Lee, Jong-Hyun;Moon, Jong-Tae
    • Journal of the Microelectronics and Packaging Society
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    • v.16 no.4
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    • pp.5-8
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    • 2009
  • In this paper, a high-quality low-temperature co-fired ceramic (LTCC) solenoid inductor using a solder ball and an air cavity on a silicon wafer for three-dimensional (3-D) system-in-package (SiP) is proposed. The LTCC multi-layer solenoid inductor is attached using Ag paste and solder ball on a silicon wafer with the air cavity structure. The air cavity is formed on a silicon wafer through an anisotropic wet-etching technology and is able to isolate the LTCC dielectric loss which is equivalent to a low k material effect. The electrical coupling between the metal layer and the LTCC dielectric layer is decreased by adopting the air cavity. The LTCC solenoid inductor using the solder ball and the air cavity on silicon wafer has an improved Q factor and self-resonant frequency (SRF) by reducing the LTCC dielectric resistance and parasitic capacitance. Also, 3-D device stacking technologies provide an effective path to the miniaturization of electronic systems.

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On-wafer Tuning of the TFBAR Ladder Filters (박막공진 여파기에 대한 기판위에서의 튜닝)

  • 김종수;김건욱;구명권;육종관;박한규
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2002.11a
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    • pp.3-6
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    • 2002
  • In this paper, Thin film bulk acoustic resonate.(TFBAR) fillers tuned by gold plated on-wafer inductors are presented. The air-gap type TEBAR is used with aluminum nitride(AIN) as piezoelectric material and platinum as top and bottom electrodes. Inductor equivalent model and modified Butterworth-Van Dyke(MBVD) model are employed for the frequency tuning of fabricated TFBAR bandpass filters. Fabricated inductor has inductance of 3 nH and Q factor of about 8 at 2 ㎓. It is clearly revealed that inductor tuning can enhance the bandwidth of ladder filters and improve out-of-band rejection characteristic around 10㏈.

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A 6Gbps 1:2 Demultlplexer Design Using Micro Stacked Spiral inductor in CMOS Technology (Micro Stacked Spiral Inductor를 이용한 6Gbps 1:2 Demultiplexer 설계)

  • Choi, Jung-Myung;Burm, Jin-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.58-64
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    • 2008
  • A 6Gbps 1:2 demultiplexer(DEMUX) IC using $0.18{\mu}m$ CMOS was designed and fabricated. For high speed performance current mode logic(CML) flipflop was used and inductive peaking technology was used so as to obtain higher speed than conventional Current mode logic flipflop. On-chip spiral inductor was designed to maximize the inductive peaking effect using stack structure. Total twelve inductors of $100{\mu}m^2$ area increase was used. The measurement was processed on wafer and 1:2 demultiplexer with and without micro stacked spiral inductors were compared. For 6Gbps data rate measurement, eye width was improved 7.27% and Jitter was improved 43% respectively. Power consumption was 76.8mW and eye height was 180mV at 6 Gbps

Enhanced Parallel-Branch Spiral Inductors (병렬분기 방법을 이용한 박막 나선 인덕터의 특성 향상)

  • 서동우;민봉기;강진영;백문철
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.89-93
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    • 2002
  • In the present paper we suggested a parallel-branch structure of aluminum spiral inductor for the use of RF integrated circuit at 1∼3 GHz. The inductor was implemented on P-type silicon wafer (5∼15 Ω-cm) under the standard CMOS process and it showed a improved quality(Q) factor by more than 10% with no degradation of inductance. The effect of the structure modification on the Q factor and the inductance was scrutinized comparing with those of the conventional spiral inductors.

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A Study on the Out-of-Band Rejection Improvement of TFBAR Ladder Filter using On-Wafer Inductors (기판상의 인덕터를 이용한 박막 공진 여파기의 대역 외 저지특성 개선 연구)

  • 김종수;구명권;육종관
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.3
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    • pp.284-290
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    • 2004
  • In this paper, two types of thin nim bulk acoustic resonator(TFBAR) ladder filters are desisted and fabricated to analyze the effects of on-wafer inductor integration. To suppress the overmode phenomenon a 1 $\mu\textrm{m}$ thick air-gap is fabricated under the TFBAR and aluminum nitride is used for piezoelectric material, while platinum is employed for the top and bottom electrodes. The Tx filter in a duplexer, which usually has a steeper skirt characteristics o the right side of the passband, is designed with four serial and two shunt resonators, namely, a 4/2 stage. Similarly, the Rx filter is devised with a 3/4 stage to create a mirrored image of the Tx filter passband characteristics. Fabricated on-wafer spiral inductors with underpass reveals the Q factor of 5~9 at 2 ㎓. Inductor integrated filters have approximately 10 to 12 ㏈ out-of-band rejection improvement, when compared to the original filters.

A New Planar Spiral Inductor with Multi-layered Bragg Reflector for Si-Based RFIC's

  • Mai Linh;Lee Jae-Young;Le Minh-Tuan;Pham Van-Su;Yoon Gi-Wan
    • Journal of information and communication convergence engineering
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    • v.4 no.2
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    • pp.88-91
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    • 2006
  • In this paper, a novel physical structure for planar spiral inductors is proposed. The spiral inductors were designed and fabricated on multi-layered substrate Bragg-reflector/silicon (BR/Si) wafer. The impacts of multi-layered structure substrate and pattern on characteristics of inductor were studied. Experimental results show that the inductor embedded on Bragg reflector/silicon substrate can achieve the best improvement. At 0.4-1.6 GHz, the Bragg reflector seems to significantly increase the S11-parameter of the inductor.

A New Planar Spiral Inductor with Multi-layered Bragg Reflector for Si-Based RF IC's

  • Linh Mai;Lee Jae-Young;Tuan Le Minh;Su Pham Van;Yoon Gi-Wan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2006.05a
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    • pp.255-258
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    • 2006
  • In this paper, a novel physical structure for planar spiral inductors is proposed. The spiral inductors were designed and fabricated on multi-layered substrate Bragg-reflector/silicon (BR/Si) wafer. The impacts of multi-layered structure substrate and pattern on characteristics of inductor were studied. Experimental results show that the inductor embedded on Bragg reflector/silicon substrate can achieve the best improvement. At 0.4-1.6 GHz, the Bragg reflector seems to significantly increase the $S_{11}-parameter$ of the inductor.

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Fabrication of Micromachined On-chip High Ratio Air Core Solenoid Inductor (MEMS에 의한 On-chip 고종횡비 Air Core Solenoid 인덕터의 제작)

  • Lee Jeong-Bong;Kim Kyung-Hwan
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.8
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    • pp.780-784
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    • 2006
  • We present high aspect ratio air-core solenoid inductors with $100{\mu}m\;and\;200{\mu}m$ tall via structures on Pyrex wafer. The effect of various parameters such as different number of turns, via heights, pitch distance between turns on inductor's radio frequency (RF) characteristics have been studied. The highest Q factor we obtained from various solenoid inductors is 72.8 at 9.7 GHz, which was produced by a 3-turn inductor.

Enhancement of Q Factor in Parallel-Branch Spiral Inductors (병렬분기 방법을 이용한 박막 나선 인덕터의 Q 인자 향상)

  • 서동우;민봉기;강진영;백문철
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.1
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    • pp.83-87
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    • 2003
  • In the present paper we suggested a parallel branch structure of aluminum spiral inductor for the use of RF integrated circuit at 1∼3 GHz. The inductor was implemented on p-type silicon wafer (5∼15Ω-cm) under the standard CMOS process and it showed a enhanced qualify(Q) factor by more than 10 % with no degradation of inductance. The effect of the structure modification on the Q factor and the inductance was scrutinized comparing with conventional spital inductors